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| author | Nate Begeman <natebegeman@mac.com> | 2005-08-19 03:42:28 +0000 |
|---|---|---|
| committer | Nate Begeman <natebegeman@mac.com> | 2005-08-19 03:42:28 +0000 |
| commit | 27d53ba6dd58543b1a3f5f92be522e0d6d75daf8 (patch) | |
| tree | 56c1ce135ece8d4870802956350fc2194d09f5c8 /lib/Target/PowerPC/PPCISelPattern.cpp | |
| parent | 957e574b30e9345f6fff4a8b3478706790d4c877 (diff) | |
Fix a bug where we were passing the wrong number of arguments to an
instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22901 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPCISelPattern.cpp')
| -rw-r--r-- | lib/Target/PowerPC/PPCISelPattern.cpp | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/lib/Target/PowerPC/PPCISelPattern.cpp b/lib/Target/PowerPC/PPCISelPattern.cpp index 3ca7cd6c61..caf6b3981d 100644 --- a/lib/Target/PowerPC/PPCISelPattern.cpp +++ b/lib/Target/PowerPC/PPCISelPattern.cpp @@ -469,7 +469,10 @@ void ISel::MoveCRtoGPR(unsigned CCReg, ISD::CondCode CC, unsigned Result){ BuildMI(BB, PPC::MCRF, 1, PPC::CR7).addReg(CCReg); bool GPOpt = TLI.getTargetMachine().getSubtarget<PPCSubtarget>().isGigaProcessor(); - BuildMI(BB, GPOpt ? PPC::MFOCRF : PPC::MFCR, 1, IntCR).addReg(PPC::CR7); + if (GPOpt) + BuildMI(BB, PPC::MFOCRF, 1, IntCR).addReg(PPC::CR7); + else + BuildMI(BB, PPC::MFCR, 0, IntCR); if (Inv) { unsigned Tmp1 = MakeIntReg(); BuildMI(BB, PPC::RLWINM, 4, Tmp1).addReg(IntCR).addImm(32-(3-Idx)) |