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| author | Chris Lattner <sabre@nondot.org> | 2005-04-30 04:26:06 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2005-04-30 04:26:06 +0000 |
| commit | 17234b7d78944151b844e07a427df5b218add76b (patch) | |
| tree | 2b48c862c49da532c795f2ce6ad44bd318553914 /lib/Target/PowerPC/PPCISelPattern.cpp | |
| parent | c5dcb53bea2b3d735f7e419dd9b1f7fb893d8e47 (diff) | |
This target doesn't support the FSIN/FCOS/FSQRT nodes yet
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21633 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPCISelPattern.cpp')
| -rw-r--r-- | lib/Target/PowerPC/PPCISelPattern.cpp | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/lib/Target/PowerPC/PPCISelPattern.cpp b/lib/Target/PowerPC/PPCISelPattern.cpp index 40a2610f2c..a5732f0576 100644 --- a/lib/Target/PowerPC/PPCISelPattern.cpp +++ b/lib/Target/PowerPC/PPCISelPattern.cpp @@ -61,6 +61,14 @@ namespace { setOperationAction(ISD::SREM, MVT::i32, Expand); setOperationAction(ISD::UREM, MVT::i32, Expand); + // We don't support sin/cos/sqrt + setOperationAction(ISD::FSIN , MVT::f64, Expand); + setOperationAction(ISD::FCOS , MVT::f64, Expand); + setOperationAction(ISD::FSQRT, MVT::f64, Expand); + setOperationAction(ISD::FSIN , MVT::f32, Expand); + setOperationAction(ISD::FCOS , MVT::f32, Expand); + setOperationAction(ISD::FSQRT, MVT::f32, Expand); + setSetCCResultContents(ZeroOrOneSetCCResult); addLegalFPImmediate(+0.0); // Necessary for FSEL addLegalFPImmediate(-0.0); // |