diff options
| author | Hal Finkel <hfinkel@anl.gov> | 2013-03-31 10:12:51 +0000 |
|---|---|---|
| committer | Hal Finkel <hfinkel@anl.gov> | 2013-03-31 10:12:51 +0000 |
| commit | 8049ab15e4b638a07d6f230329945c2310eca27b (patch) | |
| tree | 89ddcf3d670a9c7f4fafe2db694222cabdd48485 /lib/Target/PowerPC/PPCISelLowering.h | |
| parent | 9ad0f4907b3ba0916a8b6cdb95d298d2ddb7d405 (diff) | |
Add the PPC lfiwax instruction
This instruction is available on modern PPC64 CPUs, and is now used
to improve the SINT_TO_FP lowering (by eliminating the need for the
separate sign extension instruction and decreasing the amount of
needed stack space).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178446 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPCISelLowering.h')
| -rw-r--r-- | lib/Target/PowerPC/PPCISelLowering.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/lib/Target/PowerPC/PPCISelLowering.h b/lib/Target/PowerPC/PPCISelLowering.h index bce05a16c6..a924ac4e00 100644 --- a/lib/Target/PowerPC/PPCISelLowering.h +++ b/lib/Target/PowerPC/PPCISelLowering.h @@ -242,6 +242,11 @@ namespace llvm { /// or i32. LBRX, + /// GPRC, CHAIN = LFIWAX CHAIN, Ptr - This is a floating-point + /// load which sign-extends from a 32-bit integer value into the + /// destination 64-bit register. + LFIWAX, + /// G8RC = ADDIS_TOC_HA %X2, Symbol - For medium and large code model, /// produces an ADDIS8 instruction that adds the TOC base register to /// sym@toc@ha. |