diff options
| author | Chris Lattner <sabre@nondot.org> | 2005-09-02 18:33:05 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2005-09-02 18:33:05 +0000 |
| commit | 1e9de3ed2db440fac99e5cc85b7d98b0a23a2727 (patch) | |
| tree | 56863209cdd0f0952ccfce1101fdb3e424fe6f46 /lib/Target/PowerPC/PPCISelLowering.cpp | |
| parent | 446a4eaee5471b81c83fa449bf4dd1f5e14c3914 (diff) | |
Decouple fsqrt from gpul optimizations, implementing fsqrt.ll.
Remove the -enable-gpopt option which is subsumed by feature flags.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23218 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPCISelLowering.cpp')
| -rw-r--r-- | lib/Target/PowerPC/PPCISelLowering.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/PowerPC/PPCISelLowering.cpp b/lib/Target/PowerPC/PPCISelLowering.cpp index 8490adb3c3..d01dc05a85 100644 --- a/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/lib/Target/PowerPC/PPCISelLowering.cpp @@ -54,7 +54,7 @@ PPC32TargetLowering::PPC32TargetLowering(TargetMachine &TM) setOperationAction(ISD::SREM , MVT::f32, Expand); // If we're enabling GP optimizations, use hardware square root - if (!TM.getSubtarget<PPCSubtarget>().isGigaProcessor()) { + if (!TM.getSubtarget<PPCSubtarget>().hasFSQRT()) { setOperationAction(ISD::FSQRT, MVT::f64, Expand); setOperationAction(ISD::FSQRT, MVT::f32, Expand); } |