diff options
| author | Hal Finkel <hfinkel@anl.gov> | 2012-12-25 17:22:53 +0000 |
|---|---|---|
| committer | Hal Finkel <hfinkel@anl.gov> | 2012-12-25 17:22:53 +0000 |
| commit | cd9ea5198660a80c9c28c6471b0983bb450ca8cb (patch) | |
| tree | 970da7926be09c4e4a81f5ae9b47237cbdfefce6 /lib/Target/PowerPC/PPCISelLowering.cpp | |
| parent | 59a65f7b24350cf483d777acfb403e9b8a31a771 (diff) | |
Expand PPC64 atomic load and store
Use of store or load with the atomic specifier on 64-bit types would
cause instruction-selection failures. As with the 32-bit case, these
can use the default expansion in terms of cmp-and-swap.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171072 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPCISelLowering.cpp')
| -rw-r--r-- | lib/Target/PowerPC/PPCISelLowering.cpp | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/lib/Target/PowerPC/PPCISelLowering.cpp b/lib/Target/PowerPC/PPCISelLowering.cpp index 9cc4e9615d..b14c181249 100644 --- a/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/lib/Target/PowerPC/PPCISelLowering.cpp @@ -443,6 +443,8 @@ PPCTargetLowering::PPCTargetLowering(PPCTargetMachine &TM) setOperationAction(ISD::ATOMIC_LOAD, MVT::i32, Expand); setOperationAction(ISD::ATOMIC_STORE, MVT::i32, Expand); + setOperationAction(ISD::ATOMIC_LOAD, MVT::i64, Expand); + setOperationAction(ISD::ATOMIC_STORE, MVT::i64, Expand); setBooleanContents(ZeroOrOneBooleanContent); setBooleanVectorContents(ZeroOrOneBooleanContent); // FIXME: Is this correct? |