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authorBill Schmidt <wschmidt@linux.vnet.ibm.com>2012-12-13 20:57:10 +0000
committerBill Schmidt <wschmidt@linux.vnet.ibm.com>2012-12-13 20:57:10 +0000
commit1e18b861920ad2fd1a63e006cac61a4e274e5fdf (patch)
treec35d5bfd6124f4cfe44d06a9d6838d98d9c4ea0e /lib/Target/PowerPC/PPCISelLowering.cpp
parent009e1e21d4e4d26d4aeaeeb5063c0b4470572ef7 (diff)
This is another cleanup patch for 64-bit PowerPC TLS processing. I had
some hackery in place that hid my poor use of TblGen, which I've now sorted out and cleaned up. No change in observable behavior, so no new test cases. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170149 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPCISelLowering.cpp')
-rw-r--r--lib/Target/PowerPC/PPCISelLowering.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/PowerPC/PPCISelLowering.cpp b/lib/Target/PowerPC/PPCISelLowering.cpp
index 0748bd53a8..110ed6ef11 100644
--- a/lib/Target/PowerPC/PPCISelLowering.cpp
+++ b/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -1402,7 +1402,7 @@ SDValue PPCTargetLowering::LowerGlobalTLSAddress(SDValue Op,
// copies dissolve during subsequent transforms.
Chain = DAG.getCopyToReg(Chain, dl, PPC::X3, TLSAddr);
SDValue DtvOffsetHi = DAG.getNode(PPCISD::ADDIS_DTPREL_HA, dl, PtrVT,
- ParmReg, TGA, Chain);
+ Chain, ParmReg, TGA);
return DAG.getNode(PPCISD::ADDI_DTPREL_L, dl, PtrVT, DtvOffsetHi, TGA);
}