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authorEvan Cheng <evan.cheng@apple.com>2006-08-25 21:54:44 +0000
committerEvan Cheng <evan.cheng@apple.com>2006-08-25 21:54:44 +0000
commitb9ca92661cf145bfb3bd9705e5629fc5f411a42f (patch)
tree7c03a75029f32964ac39fd060e4d80e1de5f9d3e /lib/Target/PowerPC/PPCBranchSelector.cpp
parent05545755676b9ff35d244e55d749a15e28bb228b (diff)
Encode pc-relative conditional branch offset as pc+(num of bytes / 4). The
asm printer will print it as offset*4. e.g. bne cr0, $+8. The PPC code emitter was expecting the offset to be number of instructions, not number of bytes. This fixes a whole bunch of JIT failures. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29885 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPCBranchSelector.cpp')
-rw-r--r--lib/Target/PowerPC/PPCBranchSelector.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/PowerPC/PPCBranchSelector.cpp b/lib/Target/PowerPC/PPCBranchSelector.cpp
index b3d100cf5e..78932a9a76 100644
--- a/lib/Target/PowerPC/PPCBranchSelector.cpp
+++ b/lib/Target/PowerPC/PPCBranchSelector.cpp
@@ -133,7 +133,7 @@ bool PPCBSel::runOnMachineFunction(MachineFunction &Fn) {
if (Displacement >= -32768 && Displacement <= 32767) {
BuildMI(*MBB, MBBJ, Opcode, 2).addReg(CRReg).addMBB(trueMBB);
} else {
- BuildMI(*MBB, MBBJ, Inverted, 2).addReg(CRReg).addImm(8);
+ BuildMI(*MBB, MBBJ, Inverted, 2).addReg(CRReg).addImm(2);
BuildMI(*MBB, MBBJ, PPC::B, 1).addMBB(trueMBB);
}