diff options
author | Nate Begeman <natebegeman@mac.com> | 2004-09-29 02:35:05 +0000 |
---|---|---|
committer | Nate Begeman <natebegeman@mac.com> | 2004-09-29 02:35:05 +0000 |
commit | a41fc77ae40db49d711fc6f9c43b704a3b408e60 (patch) | |
tree | 7eafbccc5f9aa0c7a6732af2f7254342e24d37d8 /lib/Target/PowerPC/PPC32ISelSimple.cpp | |
parent | 6a0ec6fcf6e45c9212535c481566e2454a7cc377 (diff) |
To go along with sabre's improved InstCombining, improve recognition of
integers that we can use as immediate values in instructions.
Example from yacr2:
- lis r10, -1
- ori r10, r10, 65535
- add r28, r28, r10
+ addi r28, r28, -1
addi r7, r7, 1
addi r9, r9, 1
b .LBB_main_9 ; loopentry.1.i214
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16566 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPC32ISelSimple.cpp')
-rw-r--r-- | lib/Target/PowerPC/PPC32ISelSimple.cpp | 30 |
1 files changed, 9 insertions, 21 deletions
diff --git a/lib/Target/PowerPC/PPC32ISelSimple.cpp b/lib/Target/PowerPC/PPC32ISelSimple.cpp index c8fde63e93..afb96f732d 100644 --- a/lib/Target/PowerPC/PPC32ISelSimple.cpp +++ b/lib/Target/PowerPC/PPC32ISelSimple.cpp @@ -32,9 +32,6 @@ using namespace llvm; namespace { - Statistic<> - MultiUseGEP("ppc-codegen", "Number of GEPs folded with more than one use"); - /// TypeClass - Used by the PowerPC backend to group LLVM types by their basic /// PPC Representation. /// @@ -491,34 +488,27 @@ bool PPC32ISel::canUseAsImmediateForOpcode(ConstantInt *CI, unsigned Operator) { ConstantUInt *Op1Cu; // ADDI, Compare, and non-indexed Load take SIMM - bool cond1 = (Operator == 0) - && (Op1Cs = dyn_cast<ConstantSInt>(CI)) - && (Op1Cs->getValue() <= 32767) - && (Op1Cs->getValue() >= -32768); + bool cond1 = (Operator == 0) + && ((int32_t)CI->getRawValue() <= 32767) + && ((int32_t)CI->getRawValue() >= -32768); // SUBI takes -SIMM since it is a mnemonic for ADDI bool cond2 = (Operator == 1) - && (Op1Cs = dyn_cast<ConstantSInt>(CI)) - && (Op1Cs->getValue() <= 32768) - && (Op1Cs->getValue() >= -32767); + && ((int32_t)CI->getRawValue() <= 32768) + && ((int32_t)CI->getRawValue() >= -32767); // ANDIo, ORI, and XORI take unsigned values bool cond3 = (Operator >= 2) && (Op1Cs = dyn_cast<ConstantSInt>(CI)) && (Op1Cs->getValue() >= 0) - && (Op1Cs->getValue() <= 32767); - - // ADDI and SUBI take SIMMs, so we have to make sure the UInt would fit - bool cond4 = (Operator < 2) - && (Op1Cu = dyn_cast<ConstantUInt>(CI)) - && (Op1Cu->getValue() <= 32767); + && (Op1Cs->getValue() <= 65535); // ANDIo, ORI, and XORI take UIMMs, so they can be larger - bool cond5 = (Operator >= 2) + bool cond4 = (Operator >= 2) && (Op1Cu = dyn_cast<ConstantUInt>(CI)) && (Op1Cu->getValue() <= 65535); - if (cond1 || cond2 || cond3 || cond4 || cond5) + if (cond1 || cond2 || cond3 || cond4) return true; return false; @@ -3321,10 +3311,8 @@ void PPC32ISel::emitGEPOperation(MachineBasicBlock *MBB, GetElementPtrInst *GEPI, bool GEPIsFolded) { // If we've already emitted this particular GEP, just return to avoid // multiple definitions of the base register. - if (GEPIsFolded && (GEPMap[GEPI].base != 0)) { - MultiUseGEP++; + if (GEPIsFolded && (GEPMap[GEPI].base != 0)) return; - } Value *Src = GEPI->getOperand(0); User::op_iterator IdxBegin = GEPI->op_begin()+1; |