aboutsummaryrefslogtreecommitdiff
path: root/lib/Target/Mips
diff options
context:
space:
mode:
authorAkira Hatanaka <ahatanaka@mips.com>2012-12-20 04:22:39 +0000
committerAkira Hatanaka <ahatanaka@mips.com>2012-12-20 04:22:39 +0000
commitc23061547de868c5971e1f7a12bc54a37a59a53f (patch)
treec1ea9c73be43b57aef96ed226af8d98b2e961d9d /lib/Target/Mips
parent1e7739f6140da773b6e998525d7900fa82670f00 (diff)
[mips] Refactor unconditional branch instruction. Separate encoding information
from the rest. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170663 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips')
-rw-r--r--lib/Target/Mips/MipsInstrFormats.td11
-rw-r--r--lib/Target/Mips/MipsInstrInfo.td10
2 files changed, 15 insertions, 6 deletions
diff --git a/lib/Target/Mips/MipsInstrFormats.td b/lib/Target/Mips/MipsInstrFormats.td
index b2633df21b..58e409939b 100644
--- a/lib/Target/Mips/MipsInstrFormats.td
+++ b/lib/Target/Mips/MipsInstrFormats.td
@@ -279,6 +279,17 @@ class BGEZ_FM<bits<6> op, bits<5> funct> {
let Inst{15-0} = offset;
}
+class B_FM {
+ bits<16> offset;
+
+ bits<32> Inst;
+
+ let Inst{31-26} = 4;
+ let Inst{25-21} = 0;
+ let Inst{20-16} = 0;
+ let Inst{15-0} = offset;
+}
+
//===----------------------------------------------------------------------===//
//
// FLOATING POINT INSTRUCTION FORMATS
diff --git a/lib/Target/Mips/MipsInstrInfo.td b/lib/Target/Mips/MipsInstrInfo.td
index 4f5560ac15..5fce6391b4 100644
--- a/lib/Target/Mips/MipsInstrInfo.td
+++ b/lib/Target/Mips/MipsInstrInfo.td
@@ -596,11 +596,9 @@ class JumpFJ<bits<6> op, DAGOperand opnd, string instr_asm,
}
// Unconditional branch
-class UncondBranch<bits<6> op, string instr_asm>:
- BranchBase<op, (outs), (ins brtarget:$imm16),
- !strconcat(instr_asm, "\t$imm16"), [(br bb:$imm16)], IIBranch> {
- let rs = 0;
- let rt = 0;
+class UncondBranch<string opstr> :
+ InstSE<(outs), (ins brtarget:$offset), !strconcat(opstr, "\t$offset"),
+ [(br bb:$offset)], IIBranch, FrmI> {
let isBranch = 1;
let isTerminator = 1;
let isBarrier = 1;
@@ -979,7 +977,7 @@ def SC_P8 : SCBase<0x38, "sc", CPURegs, mem64>,
def J : JumpFJ<0x02, jmptarget, "j", br, bb>,
Requires<[RelocStatic, HasStdEnc]>, IsBranch;
def JR : IndirectBranch<CPURegs>;
-def B : UncondBranch<0x04, "b">;
+def B : UncondBranch<"b">, B_FM;
def BEQ : CBranch<"beq", seteq, CPURegs>, BEQ_FM<4>;
def BNE : CBranch<"bne", setne, CPURegs>, BEQ_FM<5>;
def BGEZ : CBranchZero<"bgez", setge, CPURegs>, BGEZ_FM<1, 1>;