Make psuedo FEXT_T8I816_ins into a custom emitter.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176002 91177308-0d34-0410-b5e6-96231b3b80d8

5 files changed, 39 insertions, 61 deletions

diff --git a/lib/Target/Mips/Mips16InstrInfo.cpp b/lib/Target/Mips/Mips16InstrInfo.cpp
index c04d49ed47..3c99b603d5 100644
--- a/lib/Target/Mips/Mips16InstrInfo.cpp
+++ b/lib/Target/Mips/Mips16InstrInfo.cpp
@@ -135,30 +135,6 @@ bool Mips16InstrInfo::expandPostRAPseudo(MachineBasicBlock::iterator MI) const {
   switch(MI->getDesc().getOpcode()) {
   default:
     return false;
-  case Mips::BteqzT8CmpiX16:
-    ExpandFEXT_T8I8I16_ins(MBB, MI, Mips::BteqzX16,
-                           Mips::CmpiRxImm16, Mips::CmpiRxImmX16);
-    break;
-  case Mips::BteqzT8SltiX16:
-    ExpandFEXT_T8I8I16_ins(MBB, MI, Mips::BteqzX16,
-                           Mips::SltiRxImm16, Mips::SltiRxImmX16);
-    break;
-  case Mips::BteqzT8SltiuX16:
-    ExpandFEXT_T8I8I16_ins(MBB, MI, Mips::BteqzX16,
-                           Mips::SltiuRxImm16, Mips::SltiuRxImmX16);
-    break;
-  case Mips::BtnezT8CmpiX16:
-    ExpandFEXT_T8I8I16_ins(MBB, MI, Mips::BtnezX16,
-                           Mips::CmpiRxImm16, Mips::CmpiRxImmX16);
-    break;
-  case Mips::BtnezT8SltiX16:
-    ExpandFEXT_T8I8I16_ins(MBB, MI, Mips::BtnezX16,
-                           Mips::SltiRxImm16, Mips::SltiRxImmX16);
-    break;
-  case Mips::BtnezT8SltiuX16:
-    ExpandFEXT_T8I8I16_ins(MBB, MI, Mips::BtnezX16,
-                           Mips::SltiuRxImm16, Mips::SltiuRxImmX16);
-    break;
   case Mips::RetRA16:
     ExpandRetRA16(MBB, MI, Mips::JrcRa16);
     break;
@@ -435,35 +411,6 @@ void Mips16InstrInfo::ExpandRetRA16(MachineBasicBlock &MBB,
   BuildMI(MBB, I, I->getDebugLoc(), get(Opc));
 }
 
-
-void Mips16InstrInfo::ExpandFEXT_T8I816_ins(
-  MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
-  unsigned BtOpc, unsigned CmpOpc) const {
-  unsigned regX = I->getOperand(0).getReg();
-  unsigned regY = I->getOperand(1).getReg();
-  MachineBasicBlock *target = I->getOperand(2).getMBB();
-  BuildMI(MBB, I, I->getDebugLoc(), get(CmpOpc)).addReg(regX).addReg(regY);
-  BuildMI(MBB, I, I->getDebugLoc(), get(BtOpc)).addMBB(target);
-
-}
-
-void Mips16InstrInfo::ExpandFEXT_T8I8I16_ins(
-  MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
-  unsigned BtOpc, unsigned CmpiOpc, unsigned CmpiXOpc) const {
-  unsigned regX = I->getOperand(0).getReg();
-  int64_t imm = I->getOperand(1).getImm();
-  MachineBasicBlock *target = I->getOperand(2).getMBB();
-  unsigned CmpOpc;
-  if (isUInt<8>(imm))
-    CmpOpc = CmpiOpc;
-  else if (isUInt<16>(imm))
-    CmpOpc = CmpiXOpc;
-  else
-    llvm_unreachable("immediate field not usable");
-  BuildMI(MBB, I, I->getDebugLoc(), get(CmpOpc)).addReg(regX).addImm(imm);
-  BuildMI(MBB, I, I->getDebugLoc(), get(BtOpc)).addMBB(target);
-}
-
 void Mips16InstrInfo::ExpandFEXT_CCRX16_ins(
   MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
   unsigned SltOpc) const {
diff --git a/lib/Target/Mips/Mips16InstrInfo.h b/lib/Target/Mips/Mips16InstrInfo.h
index 0048fff5e6..c01e9cacbd 100644
--- a/lib/Target/Mips/Mips16InstrInfo.h
+++ b/lib/Target/Mips/Mips16InstrInfo.h
@@ -115,14 +115,6 @@ private:
                                      MachineBasicBlock &MBB,
                                      MachineBasicBlock::iterator I) const;
 
-  void ExpandFEXT_T8I816_ins(MachineBasicBlock &MBB,
-                             MachineBasicBlock::iterator I,
-                             unsigned BtOpc, unsigned CmpOpc) const;
-
-  void ExpandFEXT_T8I8I16_ins(
-    MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
-    unsigned BtOpc, unsigned CmpiOpc, unsigned CmpiXOpc) const;
-
   void ExpandFEXT_CCRX16_ins(
     MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
     unsigned SltOpc) const;
diff --git a/lib/Target/Mips/Mips16InstrInfo.td b/lib/Target/Mips/Mips16InstrInfo.td
index 01be7e7137..e11b1a75e3 100644
--- a/lib/Target/Mips/Mips16InstrInfo.td
+++ b/lib/Target/Mips/Mips16InstrInfo.td
@@ -237,6 +237,7 @@ class FEXT_T8I8I16_ins<string asmstr, string asmstr2>:
                !strconcat(asmstr2, !strconcat("\t$rx, $imm\n\t",
                !strconcat(asmstr, "\t$targ"))), []> {
   let isCodeGenOnly=1;
+  let usesCustomInserter = 1;
 }
 //
 
diff --git a/lib/Target/Mips/MipsISelLowering.cpp b/lib/Target/Mips/MipsISelLowering.cpp
index 1a0d97bf6d..3c54e18d14 100644
--- a/lib/Target/Mips/MipsISelLowering.cpp
+++ b/lib/Target/Mips/MipsISelLowering.cpp
@@ -1443,6 +1443,28 @@ MachineBasicBlock
   MI->eraseFromParent();   // The pseudo instruction is gone now.
   return BB;
 }
+
+
+MachineBasicBlock *MipsTargetLowering::EmitFEXT_T8I8I16_ins(
+  unsigned BtOpc, unsigned CmpiOpc, unsigned CmpiXOpc,
+  MachineInstr *MI,  MachineBasicBlock *BB) const {
+  const TargetInstrInfo *TII = getTargetMachine().getInstrInfo();
+  unsigned regX = MI->getOperand(0).getReg();
+  int64_t imm = MI->getOperand(1).getImm();
+  MachineBasicBlock *target = MI->getOperand(2).getMBB();
+  unsigned CmpOpc;
+  if (isUInt<8>(imm))
+    CmpOpc = CmpiOpc;
+  else if (isUInt<16>(imm))
+    CmpOpc = CmpiXOpc;
+  else
+    llvm_unreachable("immediate field not usable");
+  BuildMI(*BB, MI, MI->getDebugLoc(), TII->get(CmpOpc)).addReg(regX).addImm(imm);
+  BuildMI(*BB, MI, MI->getDebugLoc(), TII->get(BtOpc)).addMBB(target);
+  MI->eraseFromParent();   // The pseudo instruction is gone now.
+  return BB;
+}
+
 MachineBasicBlock *
 MipsTargetLowering::EmitInstrWithCustomInserter(MachineInstr *MI,
                                                 MachineBasicBlock *BB) const {
@@ -1598,6 +1620,19 @@ MipsTargetLowering::EmitInstrWithCustomInserter(MachineInstr *MI,
     // TBD: figure out a way to get this or remove the instruction
     // altogether.
     return EmitFEXT_T8I816_ins(Mips::BtnezX16, Mips::SltuRxRy16, MI, BB);
+  case Mips::BteqzT8CmpiX16: return EmitFEXT_T8I8I16_ins(
+    Mips::BteqzX16, Mips::CmpiRxImm16, Mips::CmpiRxImmX16, MI, BB);
+  case Mips::BteqzT8SltiX16: return EmitFEXT_T8I8I16_ins(
+    Mips::BteqzX16, Mips::SltiRxImm16, Mips::SltiRxImmX16, MI, BB);
+  case Mips::BteqzT8SltiuX16: return EmitFEXT_T8I8I16_ins(
+    Mips::BteqzX16, Mips::SltiuRxImm16, Mips::SltiuRxImmX16, MI, BB);
+  case Mips::BtnezT8CmpiX16: return EmitFEXT_T8I8I16_ins(
+    Mips::BtnezX16, Mips::CmpiRxImm16, Mips::CmpiRxImmX16, MI, BB);
+  case Mips::BtnezT8SltiX16: return EmitFEXT_T8I8I16_ins(
+    Mips::BtnezX16, Mips::SltiRxImm16, Mips::SltiRxImmX16, MI, BB);
+  case Mips::BtnezT8SltiuX16: return EmitFEXT_T8I8I16_ins(
+    Mips::BtnezX16, Mips::SltiuRxImm16, Mips::SltiuRxImmX16, MI, BB);
+    break;
   }
 }
 
diff --git a/lib/Target/Mips/MipsISelLowering.h b/lib/Target/Mips/MipsISelLowering.h
index ac05c83210..2d1e9a95ea 100644
--- a/lib/Target/Mips/MipsISelLowering.h
+++ b/lib/Target/Mips/MipsISelLowering.h
@@ -416,6 +416,9 @@ namespace llvm {
     MachineBasicBlock *EmitFEXT_T8I816_ins(unsigned BtOpc, unsigned CmpOpc,
                                MachineInstr *MI,
                                MachineBasicBlock *BB) const;
+    MachineBasicBlock *EmitFEXT_T8I8I16_ins(
+      unsigned BtOpc, unsigned CmpiOpc, unsigned CmpiXOpc,
+      MachineInstr *MI,  MachineBasicBlock *BB) const;
   };
 }