diff options
| author | Akira Hatanaka <ahatanaka@mips.com> | 2012-08-22 03:18:13 +0000 |
|---|---|---|
| committer | Akira Hatanaka <ahatanaka@mips.com> | 2012-08-22 03:18:13 +0000 |
| commit | e7338cd550a4ccde6796d2987b482ea9f0e239ef (patch) | |
| tree | 8a7a5d4c5768e1389c53c38dbf0db39827c1c50d /lib/Target/Mips/MipsTargetMachine.cpp | |
| parent | 6522a9e04bcfa447299f4fd10ee9afffd5834a47 (diff) | |
Add register Mips::GP to the list of reserved registers if target is bare-metal
to prevent it from being clobbered. mips uses $gp to access small data section.
This bug was originally reported by Carl Norum.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162340 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/MipsTargetMachine.cpp')
| -rw-r--r-- | lib/Target/Mips/MipsTargetMachine.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/Mips/MipsTargetMachine.cpp b/lib/Target/Mips/MipsTargetMachine.cpp index 2928a73cbf..b70542bccc 100644 --- a/lib/Target/Mips/MipsTargetMachine.cpp +++ b/lib/Target/Mips/MipsTargetMachine.cpp @@ -42,7 +42,7 @@ MipsTargetMachine(const Target &T, StringRef TT, CodeGenOpt::Level OL, bool isLittle) : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL), - Subtarget(TT, CPU, FS, isLittle), + Subtarget(TT, CPU, FS, isLittle, RM), DataLayout(isLittle ? (Subtarget.isABI_N64() ? "e-p:64:64:64-i8:8:32-i16:16:32-i64:64:64-f128:128:128-n32" : |