aboutsummaryrefslogtreecommitdiff
path: root/lib/Target/Mips/MipsTargetMachine.cpp
diff options
context:
space:
mode:
authorAkira Hatanaka <ahatanak@gmail.com>2011-04-15 19:52:08 +0000
committerAkira Hatanaka <ahatanak@gmail.com>2011-04-15 19:52:08 +0000
commit99a2e98eddf00c4afd3817564cb8c914a6f66ae9 (patch)
treee8a278000fc29086534d63dc2e15a3af6217841f /lib/Target/Mips/MipsTargetMachine.cpp
parentb6a638898a92d5cd782209fbeb673fe7846a29eb (diff)
Add pass that expands pseudo instructions into target instructions after register allocation. Define pseudos that get expanded into mtc1 or mfc1 instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129594 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/MipsTargetMachine.cpp')
-rw-r--r--lib/Target/Mips/MipsTargetMachine.cpp6
1 files changed, 6 insertions, 0 deletions
diff --git a/lib/Target/Mips/MipsTargetMachine.cpp b/lib/Target/Mips/MipsTargetMachine.cpp
index 7a2dd1f651..53190b4600 100644
--- a/lib/Target/Mips/MipsTargetMachine.cpp
+++ b/lib/Target/Mips/MipsTargetMachine.cpp
@@ -75,3 +75,9 @@ addPreEmitPass(PassManagerBase &PM, CodeGenOpt::Level OptLevel)
PM.add(createMipsDelaySlotFillerPass(*this));
return true;
}
+
+bool MipsTargetMachine::
+addPostRegAlloc(PassManagerBase &PM, CodeGenOpt::Level OptLevel) {
+ PM.add(createMipsExpandPseudoPass(*this));
+ return true;
+}