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authorEvan Cheng <evan.cheng@apple.com>2011-07-20 07:51:56 +0000
committerEvan Cheng <evan.cheng@apple.com>2011-07-20 07:51:56 +0000
commit34ad6db8b958fdc0d38e122edf753b5326e69b03 (patch)
treec129b78e36733ba161a2e687349a0eb40d2ec807 /lib/Target/Mips/MipsTargetMachine.cpp
parent4c8164813c1be51f6797fda6826bdf3665f2a7d1 (diff)
- Move CodeModel from a TargetMachine global option to MCCodeGenInfo.
- Introduce JITDefault code model. This tells targets to set different default code model for JIT. This eliminates the ugly hack in TargetMachine where code model is changed after construction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135580 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/MipsTargetMachine.cpp')
-rw-r--r--lib/Target/Mips/MipsTargetMachine.cpp10
1 files changed, 6 insertions, 4 deletions
diff --git a/lib/Target/Mips/MipsTargetMachine.cpp b/lib/Target/Mips/MipsTargetMachine.cpp
index a195a48961..703d9e7002 100644
--- a/lib/Target/Mips/MipsTargetMachine.cpp
+++ b/lib/Target/Mips/MipsTargetMachine.cpp
@@ -32,9 +32,10 @@ extern "C" void LLVMInitializeMipsTarget() {
// Using CodeModel::Large enables different CALL behavior.
MipsTargetMachine::
MipsTargetMachine(const Target &T, StringRef TT,
- StringRef CPU, StringRef FS, Reloc::Model RM,
+ StringRef CPU, StringRef FS,
+ Reloc::Model RM, CodeModel::Model CM,
bool isLittle=false):
- LLVMTargetMachine(T, TT, CPU, FS, RM),
+ LLVMTargetMachine(T, TT, CPU, FS, RM, CM),
Subtarget(TT, CPU, FS, isLittle),
DataLayout(isLittle ?
std::string("e-p:32:32:32-i8:8:32-i16:16:32-i64:64:64-n32") :
@@ -46,8 +47,9 @@ MipsTargetMachine(const Target &T, StringRef TT,
MipselTargetMachine::
MipselTargetMachine(const Target &T, StringRef TT,
- StringRef CPU, StringRef FS, Reloc::Model RM) :
- MipsTargetMachine(T, TT, CPU, FS, RM, true) {}
+ StringRef CPU, StringRef FS,
+ Reloc::Model RM, CodeModel::Model CM) :
+ MipsTargetMachine(T, TT, CPU, FS, RM, CM, true) {}
// Install an instruction selector pass using
// the ISelDag to gen Mips code.