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authorAkira Hatanaka <ahatanaka@mips.com>2012-07-21 02:20:33 +0000
committerAkira Hatanaka <ahatanaka@mips.com>2012-07-21 02:20:33 +0000
commitfef904d0e824a2c587f8c1063b6c4fbf47fec898 (patch)
treefc2126e326e44248679b8a01ba7716b6a01618de /lib/Target/Mips/MipsMachineFunction.cpp
parentb7dd9fc678ab4b4c57d333cd9940b0e0d7952ea6 (diff)
Revert accidental commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160598 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/MipsMachineFunction.cpp')
-rw-r--r--lib/Target/Mips/MipsMachineFunction.cpp11
1 files changed, 4 insertions, 7 deletions
diff --git a/lib/Target/Mips/MipsMachineFunction.cpp b/lib/Target/Mips/MipsMachineFunction.cpp
index 362173eda3..e3746d4a42 100644
--- a/lib/Target/Mips/MipsMachineFunction.cpp
+++ b/lib/Target/Mips/MipsMachineFunction.cpp
@@ -33,13 +33,10 @@ unsigned MipsFunctionInfo::getGlobalBaseReg() {
const MipsSubtarget &ST = MF.getTarget().getSubtarget<MipsSubtarget>();
- const TargetRegisterClass *RC;
- if (ST.inMips16Mode())
- RC=(const TargetRegisterClass*)&Mips::CPU16RegsRegClass;
- else
- RC = ST.isABI_N64() ?
- (const TargetRegisterClass*)&Mips::CPU64RegsRegClass :
- (const TargetRegisterClass*)&Mips::CPURegsRegClass;
+ const TargetRegisterClass *RC = ST.isABI_N64() ?
+ (const TargetRegisterClass*)&Mips::CPU64RegsRegClass :
+ (const TargetRegisterClass*)&Mips::CPURegsRegClass;
+
return GlobalBaseReg = MF.getRegInfo().createVirtualRegister(RC);
}