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| author | Akira Hatanaka <ahatanaka@mips.com> | 2012-06-14 21:10:56 +0000 |
|---|---|---|
| committer | Akira Hatanaka <ahatanaka@mips.com> | 2012-06-14 21:10:56 +0000 |
| commit | 864f66085cd9543070ef01b9f7371c110ecd7898 (patch) | |
| tree | 5be60635bf3a88cff120a54da600e4b638732f65 /lib/Target/Mips/MipsInstrInfo.cpp | |
| parent | 14180454726bbef6bf5041ae19736933617b51dd (diff) | |
Fix coding style violations. Remove white spaces and tabs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158471 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/MipsInstrInfo.cpp')
| -rw-r--r-- | lib/Target/Mips/MipsInstrInfo.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/Target/Mips/MipsInstrInfo.cpp b/lib/Target/Mips/MipsInstrInfo.cpp index 060e48d75c..e4eefb9905 100644 --- a/lib/Target/Mips/MipsInstrInfo.cpp +++ b/lib/Target/Mips/MipsInstrInfo.cpp @@ -330,9 +330,9 @@ unsigned Mips::GetOppositeBranchOpc(unsigned Opc) } } -static void AnalyzeCondBr(const MachineInstr* Inst, unsigned Opc, +static void AnalyzeCondBr(const MachineInstr *Inst, unsigned Opc, MachineBasicBlock *&BB, - SmallVectorImpl<MachineOperand>& Cond) { + SmallVectorImpl<MachineOperand> &Cond) { assert(GetAnalyzableBrOpc(Opc) && "Not an analyzable branch"); int NumOp = Inst->getNumExplicitOperands(); |