diff options
author | Reed Kotler <rkotler@mips.com> | 2013-02-22 05:59:39 +0000 |
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committer | Reed Kotler <rkotler@mips.com> | 2013-02-22 05:59:39 +0000 |
commit | 00ddc5a7274fb4131f1a724bc350fd756156a80f (patch) | |
tree | 532c3defb4746748be16f9f07bdf2f73bb03f17d /lib/Target/Mips/MipsISelLowering.cpp | |
parent | 7617d032ae12ba96ad65f37d91274e6f8c14e690 (diff) |
Fix a nomenclature mistake. Slt->Slti in the functions. The "i" refers
to the immediate operand of sli or cmp function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175865 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/MipsISelLowering.cpp')
-rw-r--r-- | lib/Target/Mips/MipsISelLowering.cpp | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/lib/Target/Mips/MipsISelLowering.cpp b/lib/Target/Mips/MipsISelLowering.cpp index f1affff432..b9a0bfbe27 100644 --- a/lib/Target/Mips/MipsISelLowering.cpp +++ b/lib/Target/Mips/MipsISelLowering.cpp @@ -1298,7 +1298,7 @@ MachineBasicBlock *MipsTargetLowering::EmitSel16(unsigned Opc, MachineInstr *MI, return BB; } -MachineBasicBlock *MipsTargetLowering::EmitSelT16 +MachineBasicBlock *MipsTargetLowering::EmitSeliT16 (unsigned Opc1, unsigned Opc2, MachineInstr *MI, MachineBasicBlock *BB) const { if (DontExpandCondPseudos16) @@ -1479,17 +1479,17 @@ MipsTargetLowering::EmitInstrWithCustomInserter(MachineInstr *MI, case Mips::SelBneZ: return EmitSel16(Mips::BnezRxImm16, MI, BB); case Mips::SelTBteqZCmpi: - return EmitSelT16(Mips::BteqzX16, Mips::CmpiRxImmX16, MI, BB); + return EmitSeliT16(Mips::BteqzX16, Mips::CmpiRxImmX16, MI, BB); case Mips::SelTBteqZSlti: - return EmitSelT16(Mips::BteqzX16, Mips::SltiRxImmX16, MI, BB); + return EmitSeliT16(Mips::BteqzX16, Mips::SltiRxImmX16, MI, BB); case Mips::SelTBteqZSltiu: - return EmitSelT16(Mips::BteqzX16, Mips::SltiuRxImmX16, MI, BB); + return EmitSeliT16(Mips::BteqzX16, Mips::SltiuRxImmX16, MI, BB); case Mips::SelTBtneZCmpi: - return EmitSelT16(Mips::BtnezX16, Mips::CmpiRxImmX16, MI, BB); + return EmitSeliT16(Mips::BtnezX16, Mips::CmpiRxImmX16, MI, BB); case Mips::SelTBtneZSlti: - return EmitSelT16(Mips::BtnezX16, Mips::SltiRxImmX16, MI, BB); + return EmitSeliT16(Mips::BtnezX16, Mips::SltiRxImmX16, MI, BB); case Mips::SelTBtneZSltiu: - return EmitSelT16(Mips::BtnezX16, Mips::SltiuRxImmX16, MI, BB); + return EmitSeliT16(Mips::BtnezX16, Mips::SltiuRxImmX16, MI, BB); } } |