diff options
| author | Reed Kotler <rkotler@mips.com> | 2013-02-25 02:25:47 +0000 |
|---|---|---|
| committer | Reed Kotler <rkotler@mips.com> | 2013-02-25 02:25:47 +0000 |
| commit | de89ecd011c453108c7641f44360f3a93af90206 (patch) | |
| tree | f1f6751e116486d610ebf45aea8acab64feed8bd /lib/Target/Mips/Mips16InstrInfo.td | |
| parent | 6172f0298391e00cb669cc246e70ae2531f2cdec (diff) | |
Make pseudos FEXT_CCRX16_ins and FEXT_CCRXI16_ins into custom emitters.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176007 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/Mips16InstrInfo.td')
| -rw-r--r-- | lib/Target/Mips/Mips16InstrInfo.td | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/lib/Target/Mips/Mips16InstrInfo.td b/lib/Target/Mips/Mips16InstrInfo.td index e11b1a75e3..a9e9c52716 100644 --- a/lib/Target/Mips/Mips16InstrInfo.td +++ b/lib/Target/Mips/Mips16InstrInfo.td @@ -90,6 +90,7 @@ class FEXT_CCRXI16_ins<string asmstr>: MipsPseudo16<(outs CPU16Regs:$cc), (ins CPU16Regs:$rx, simm16:$imm), !strconcat(asmstr, "\t$rx, $imm\n\tmove\t$cc, $$t8"), []> { let isCodeGenOnly=1; + let usesCustomInserter = 1; } // JAL and JALX instruction format @@ -138,6 +139,7 @@ class FCCRR16_ins<string asmstr> : MipsPseudo16<(outs CPU16Regs:$cc), (ins CPU16Regs:$rx, CPU16Regs:$ry), !strconcat(asmstr, "\t$rx, $ry\n\tmove\t$cc, $$t8"), []> { let isCodeGenOnly=1; + let usesCustomInserter = 1; } // |