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authorAkira Hatanaka <ahatanaka@mips.com>2012-05-24 18:32:33 +0000
committerAkira Hatanaka <ahatanaka@mips.com>2012-05-24 18:32:33 +0000
commit4a5a8949cd15bab98c6d73754b4d6376b34ee8af (patch)
tree52c9027062195a4a7c8367f90d2162422df38df6 /lib/Target/Mips/Mips16InstrInfo.td
parent8d2a004822f9cc5bf38d5ef14494e2f0faa82b8c (diff)
Enable Mips16 compiler to compile a null program.
First code from the Mips16 compiler. Includes trivial test program. Patch by Reed Kotler. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157408 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/Mips16InstrInfo.td')
-rw-r--r--lib/Target/Mips/Mips16InstrInfo.td18
1 files changed, 18 insertions, 0 deletions
diff --git a/lib/Target/Mips/Mips16InstrInfo.td b/lib/Target/Mips/Mips16InstrInfo.td
new file mode 100644
index 0000000000..7cbf2d4d42
--- /dev/null
+++ b/lib/Target/Mips/Mips16InstrInfo.td
@@ -0,0 +1,18 @@
+//===- Mips16InstrInfo.td - Target Description for Mips16 -*- tablegen -*-=//
+//
+// The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This file describes Mips16 instructions.
+//
+//===----------------------------------------------------------------------===//
+
+let isReturn=1, isTerminator=1, hasDelaySlot=1, isCodeGenOnly=1,
+ isBarrier=1, hasCtrlDep=1, rx=0b000, ry=0b001 in
+def RET16 : FRR16 <0, (outs), (ins CPURAReg:$target),
+ "jr\t$target", [(MipsRet CPURAReg:$target)], IIBranch>,
+ Requires<[InMips16Mode]>;