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| author | Reed Kotler <rkotler@mips.com> | 2012-10-26 03:09:34 +0000 |
|---|---|---|
| committer | Reed Kotler <rkotler@mips.com> | 2012-10-26 03:09:34 +0000 |
| commit | 28a6214b59c0896695e478c57c485cc85f436528 (patch) | |
| tree | f47fbfbe2bd660036ad8b0b9a1956fb6acfa30f9 /lib/Target/Mips/Mips16InstrInfo.td | |
| parent | d2930d364adcaef1eac0e1d5d8dc0fa4b7616f45 (diff) | |
implement large (>16 bit) constant loading.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166749 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/Mips16InstrInfo.td')
| -rw-r--r-- | lib/Target/Mips/Mips16InstrInfo.td | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/lib/Target/Mips/Mips16InstrInfo.td b/lib/Target/Mips/Mips16InstrInfo.td index c4949ce719..74ddc99e13 100644 --- a/lib/Target/Mips/Mips16InstrInfo.td +++ b/lib/Target/Mips/Mips16InstrInfo.td @@ -971,6 +971,10 @@ class SetCC_I16<PatFrag cond_op, PatLeaf imm_type, Instruction I>: Mips16Pat<(cond_op CPU16Regs:$rx, imm_type:$imm16), (I CPU16Regs:$rx, imm_type:$imm16)>; +// Large (>16 bit) immediate loads +def : Mips16Pat<(i32 imm:$imm), + (OrRxRxRy16 (SllX16 (LiRxImmX16 (HI16 imm:$imm)), 16), + (LiRxImmX16 (LO16 imm:$imm)))>; // // Some branch conditional patterns are not generated by llvm at this time. |