diff options
author | Reed Kotler <rkotler@mips.com> | 2013-02-19 03:56:57 +0000 |
---|---|---|
committer | Reed Kotler <rkotler@mips.com> | 2013-02-19 03:56:57 +0000 |
commit | 8a20844e277d1f51600134589aeb9ca88d9ca25d (patch) | |
tree | a17b39096962f9977659d897e37f0d43c5db3849 /lib/Target/Mips/Mips16InstrInfo.cpp | |
parent | cbc6d797054a2bf2a641031f270d38804a6f2295 (diff) |
Expand pseudos/macros BteqzT8SltiX16, BteqzT8SltiuX16,
BtnezT8SltiX16, BtnezT8SltiuX16 .
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175486 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/Mips16InstrInfo.cpp')
-rw-r--r-- | lib/Target/Mips/Mips16InstrInfo.cpp | 17 |
1 files changed, 16 insertions, 1 deletions
diff --git a/lib/Target/Mips/Mips16InstrInfo.cpp b/lib/Target/Mips/Mips16InstrInfo.cpp index b6194390c8..22cb9638bc 100644 --- a/lib/Target/Mips/Mips16InstrInfo.cpp +++ b/lib/Target/Mips/Mips16InstrInfo.cpp @@ -132,7 +132,6 @@ loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, bool Mips16InstrInfo::expandPostRAPseudo(MachineBasicBlock::iterator MI) const { MachineBasicBlock &MBB = *MI->getParent(); - switch(MI->getDesc().getOpcode()) { default: return false; @@ -146,11 +145,19 @@ bool Mips16InstrInfo::expandPostRAPseudo(MachineBasicBlock::iterator MI) const { case Mips::BteqzT8SltX16: ExpandFEXT_T8I816_ins(MBB, MI, Mips::BteqzX16, Mips::SltRxRy16); break; + case Mips::BteqzT8SltiX16: + ExpandFEXT_T8I8I16_ins(MBB, MI, Mips::BteqzX16, + Mips::SltiRxImm16, Mips::SltiRxImmX16); + break; case Mips::BteqzT8SltuX16: // TBD: figure out a way to get this or remove the instruction // altogether. ExpandFEXT_T8I816_ins(MBB, MI, Mips::BteqzX16, Mips::SltuRxRy16); break; + case Mips::BteqzT8SltiuX16: + ExpandFEXT_T8I8I16_ins(MBB, MI, Mips::BteqzX16, + Mips::SltiuRxImm16, Mips::SltiuRxImmX16); + break; case Mips::BtnezT8CmpX16: ExpandFEXT_T8I816_ins(MBB, MI, Mips::BtnezX16, Mips::CmpRxRy16); break; @@ -161,11 +168,19 @@ bool Mips16InstrInfo::expandPostRAPseudo(MachineBasicBlock::iterator MI) const { case Mips::BtnezT8SltX16: ExpandFEXT_T8I816_ins(MBB, MI, Mips::BtnezX16, Mips::SltRxRy16); break; + case Mips::BtnezT8SltiX16: + ExpandFEXT_T8I8I16_ins(MBB, MI, Mips::BtnezX16, + Mips::SltiRxImm16, Mips::SltiRxImmX16); + break; case Mips::BtnezT8SltuX16: // TBD: figure out a way to get this or remove the instruction // altogether. ExpandFEXT_T8I816_ins(MBB, MI, Mips::BtnezX16, Mips::SltuRxRy16); break; + case Mips::BtnezT8SltiuX16: + ExpandFEXT_T8I8I16_ins(MBB, MI, Mips::BtnezX16, + Mips::SltiuRxImm16, Mips::SltiuRxImmX16); + break; case Mips::RetRA16: ExpandRetRA16(MBB, MI, Mips::JrcRa16); break; |