Completely rearchitect the interface between targets and the pass manager.

This pass:

1. Splits TargetMachine into TargetMachine (generic targets, can be implemented
any way, like the CBE) and LLVMTargetMachine (subclass of TM that is used by
things using libcodegen and other support).
2. Instead of having each target fully populate the passmgr for file or JIT
   output, move all this to common code, and give targets hooks they can
   implement.
3. Commonalize the target population stuff between file emission and JIT
   emission.
4. All (native code) codegen stuff now happens in a FunctionPassManager, which
   paves the way for "fast -O0" stuff in the CFE later, and now LLC could
   lazily stream .bc files from disk to use less memory.
5. There are now many fewer #includes and the targets don't depend on the
   scalar xforms or libanalysis anymore (but codegen does).
6. Changing common code generator pass ordering stuff no longer requires
   touching all targets.
7. The JIT now has the option of "-fast" codegen or normal optimized codegen,
   which is now orthogonal to the fact that JIT'ing is being done.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30081 91177308-0d34-0410-b5e6-96231b3b80d8

1 files changed, 14 insertions, 70 deletions

diff --git a/lib/Target/IA64/IA64TargetMachine.cpp b/lib/Target/IA64/IA64TargetMachine.cpp
index c512ce6781..0f7821f5af 100644
--- a/lib/Target/IA64/IA64TargetMachine.cpp
+++ b/lib/Target/IA64/IA64TargetMachine.cpp
@@ -7,7 +7,7 @@
 //
 //===----------------------------------------------------------------------===//
 //
-// This file defines the IA64 specific subclass of TargetMachine.
+// This file implements the IA64 specific subclass of TargetMachine.
 //
 //===----------------------------------------------------------------------===//
 
@@ -15,14 +15,7 @@
 #include "IA64.h"
 #include "llvm/Module.h"
 #include "llvm/PassManager.h"
-#include "llvm/CodeGen/MachineFunction.h"
-#include "llvm/CodeGen/Passes.h"
-#include "llvm/Target/TargetOptions.h"
 #include "llvm/Target/TargetMachineRegistry.h"
-#include "llvm/Transforms/Scalar.h"
-#include "llvm/Support/CommandLine.h"
-#include "llvm/ADT/Statistic.h"
-#include <iostream>
 using namespace llvm;
 
 /// IA64TargetMachineModule - Note that this is used on hosts that cannot link
@@ -33,14 +26,6 @@ extern "C" int IA64TargetMachineModule;
 int IA64TargetMachineModule = 0;
 
 namespace {
-  cl::opt<bool> DisableOutput("disable-ia64-llc-output", cl::Hidden,
-                              cl::desc("Disable the IA64 asm printer, for use "
-                                       "when profiling the code generator."));
-
-  cl::opt<bool> EnableDAGIsel("enable-ia64-dag-isel", cl::Hidden,
-		              cl::desc("Enable the IA64 DAG->DAG isel"));
-
-  // Register the target.
   RegisterTarget<IA64TargetMachine> X("ia64", "  IA-64 (Itanium)");
 }
 
@@ -76,65 +61,24 @@ IA64TargetMachine::IA64TargetMachine(const Module &M, const std::string &FS)
     TLInfo(*this) { // FIXME? check this stuff
 }
 
-// addPassesToEmitFile - We currently use all of the same passes as the JIT
-// does to emit statically compiled machine code.
-bool IA64TargetMachine::addPassesToEmitFile(PassManager &PM,
-                                            std::ostream &Out,
-                                            CodeGenFileType FileType,
-                                            bool Fast) {
-  if (FileType != TargetMachine::AssemblyFile) return true;
-
-  // FIXME: Implement efficient support for garbage collection intrinsics.
-  PM.add(createLowerGCPass());
 
-  // FIXME: Implement the invoke/unwind instructions!
-  PM.add(createLowerInvokePass(704, 16)); // on ia64 linux, jmpbufs are 704
-                                          // bytes and must be 16byte aligned
-
-  // Make sure that no unreachable blocks are instruction selected.
-  PM.add(createUnreachableBlockEliminationPass());
+//===----------------------------------------------------------------------===//
+// Pass Pipeline Configuration
+//===----------------------------------------------------------------------===//
 
-  // Add an instruction selector
-// FIXME: reap this option one day:  if(EnableDAGIsel)
+bool IA64TargetMachine::addInstSelector(FunctionPassManager &PM, bool Fast) {
   PM.add(createIA64DAGToDAGInstructionSelector(*this));
-  
-/* XXX not yet. ;)
-  // Run optional SSA-based machine code optimizations next...
-  if (!NoSSAPeephole)
-    PM.add(createIA64SSAPeepholeOptimizerPass());
-*/
-
-  // Print the instruction selected machine code...
-  if (PrintMachineCode)
-    PM.add(createMachineFunctionPrinterPass(&std::cerr));
-
-  // Perform register allocation to convert to a concrete IA64 representation
-  PM.add(createRegisterAllocator());
-
-  if (PrintMachineCode)
-    PM.add(createMachineFunctionPrinterPass(&std::cerr));
-
-  if (PrintMachineCode)
-    PM.add(createMachineFunctionPrinterPass(&std::cerr));
-
-  // Insert prolog/epilog code.  Eliminate abstract frame index references...
-  PM.add(createPrologEpilogCodeInserter());
-
-/* XXX no, not just yet */
-//  PM.add(createIA64PeepholeOptimizerPass());
+  return false;
+}
 
+bool IA64TargetMachine::addPreEmitPass(FunctionPassManager &PM, bool Fast) {
   // Make sure everything is bundled happily
   PM.add(createIA64BundlingPass(*this));
-
-  if (PrintMachineCode)  // Print the register-allocated code
-    PM.add(createIA64CodePrinterPass(std::cerr, *this));
-
-  if (!DisableOutput)
-    PM.add(createIA64CodePrinterPass(Out, *this));
-
-  // Delete machine code for this function
-  PM.add(createMachineCodeDeleter());
-
-  return false; // success!
+  return true;
+}
+bool IA64TargetMachine::addAssemblyEmitter(FunctionPassManager &PM, bool Fast, 
+                                           std::ostream &Out) {
+  PM.add(createIA64CodePrinterPass(Out, *this));
+  return false;
 }