diff options
author | Andrew Lenharth <andrewl@lenharth.org> | 2005-06-18 18:34:52 +0000 |
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committer | Andrew Lenharth <andrewl@lenharth.org> | 2005-06-18 18:34:52 +0000 |
commit | 558bc88a00930fce283b240b7c9555f649a18f1b (patch) | |
tree | cb2953e86c8a44260ab9f896e694fd77b19b9ad7 /lib/Target/IA64/IA64ISelPattern.cpp | |
parent | f5428213853bae45247fe6da711ff20954d73dbd (diff) |
core changes for varargs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22254 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/IA64/IA64ISelPattern.cpp')
-rw-r--r-- | lib/Target/IA64/IA64ISelPattern.cpp | 56 |
1 files changed, 35 insertions, 21 deletions
diff --git a/lib/Target/IA64/IA64ISelPattern.cpp b/lib/Target/IA64/IA64ISelPattern.cpp index 2e34b36715..0830468a95 100644 --- a/lib/Target/IA64/IA64ISelPattern.cpp +++ b/lib/Target/IA64/IA64ISelPattern.cpp @@ -114,12 +114,16 @@ namespace { SelectionDAG &DAG); virtual std::pair<SDOperand, SDOperand> - LowerVAStart(SDOperand Chain, SelectionDAG &DAG); + LowerVAStart(SDOperand Chain, SelectionDAG &DAG, SDOperand Dest); virtual std::pair<SDOperand,SDOperand> - LowerVAArgNext(bool isVANext, SDOperand Chain, SDOperand VAList, + LowerVAArgNext(SDOperand Chain, SDOperand VAList, const Type *ArgTy, SelectionDAG &DAG); + virtual std::pair<SDOperand,SDOperand> + LowerVACopy(SDOperand Chain, SDOperand Src, SDOperand Dest, + SelectionDAG &DAG); + virtual std::pair<SDOperand, SDOperand> LowerFrameReturnAddress(bool isFrameAddr, SDOperand Chain, unsigned Depth, SelectionDAG &DAG); @@ -380,34 +384,44 @@ IA64TargetLowering::LowerCallTo(SDOperand Chain, } std::pair<SDOperand, SDOperand> -IA64TargetLowering::LowerVAStart(SDOperand Chain, SelectionDAG &DAG) { - // vastart just returns the address of the VarArgsFrameIndex slot. - return std::make_pair(DAG.getFrameIndex(VarArgsFrameIndex, MVT::i64), Chain); +IA64TargetLowering::LowerVAStart(SDOperand Chain, SelectionDAG &DAG, SDOperand Dest) { + // vastart just stores the address of the VarArgsFrameIndex slot. + SDOperand FR = DAG.getFrameIndex(VarArgsFrameIndex, MVT::i64); + SDOperand Result = DAG.getNode(ISD::STORE, MVT::Other, Chain, FR, Dest, DAG.getSrcValue(NULL)); + return std::make_pair(Result, Result); } std::pair<SDOperand,SDOperand> IA64TargetLowering:: -LowerVAArgNext(bool isVANext, SDOperand Chain, SDOperand VAList, +LowerVAArgNext(SDOperand Chain, SDOperand VAList, const Type *ArgTy, SelectionDAG &DAG) { MVT::ValueType ArgVT = getValueType(ArgTy); - SDOperand Result; - if (!isVANext) { - Result = DAG.getLoad(ArgVT, DAG.getEntryNode(), VAList, DAG.getSrcValue(NULL)); - } else { - unsigned Amt; - if (ArgVT == MVT::i32 || ArgVT == MVT::f32) - Amt = 8; - else { - assert((ArgVT == MVT::i64 || ArgVT == MVT::f64) && - "Other types should have been promoted for varargs!"); - Amt = 8; - } - Result = DAG.getNode(ISD::ADD, VAList.getValueType(), VAList, - DAG.getConstant(Amt, VAList.getValueType())); - } + SDOperand Val = DAG.getLoad(MVT::i64, Chain, VAList, DAG.getSrcValue(NULL)); + SDOperand Result = DAG.getLoad(ArgVT, DAG.getEntryNode(), Val, DAG.getSrcValue(NULL)); + unsigned Amt; + if (ArgVT == MVT::i32 || ArgVT == MVT::f32) + Amt = 8; + else { + assert((ArgVT == MVT::i64 || ArgVT == MVT::f64) && + "Other types should have been promoted for varargs!"); + Amt = 8; + } + Val = DAG.getNode(ISD::ADD, Val.getValueType(), Val, + DAG.getConstant(Amt, Val.getValueType())); + Chain = DAG.getNode(ISD::STORE, MVT::Other, Chain, + Val, VAList, DAG.getSrcValue(NULL)); return std::make_pair(Result, Chain); } +std::pair<SDOperand,SDOperand> +IA64TargetLowering::LowerVACopy(SDOperand Chain, SDOperand Src, + SDOperand Dest, SelectionDAG &DAG) +{ + SDOperand Result = DAG.getNode(ISD::STORE, MVT::Other, Chain, + Src, Dest, DAG.getSrcValue(NULL)); + return std::make_pair(Result, Result); +} + std::pair<SDOperand, SDOperand> IA64TargetLowering:: LowerFrameReturnAddress(bool isFrameAddress, SDOperand Chain, unsigned Depth, SelectionDAG &DAG) { |