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authorJia Liu <proljc@gmail.com>2012-02-18 12:03:15 +0000
committerJia Liu <proljc@gmail.com>2012-02-18 12:03:15 +0000
commit31d157ae1ac2cd9c787dc3c1d28e64c682803844 (patch)
treef26bc6f243960a904162b8ef10f0687800a41191 /lib/Target/Hexagon/HexagonTargetMachine.cpp
parent107506f814f42af4a905156e7ce5dd9a2ca6c0c7 (diff)
Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150878 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Hexagon/HexagonTargetMachine.cpp')
-rw-r--r--lib/Target/Hexagon/HexagonTargetMachine.cpp3
1 files changed, 2 insertions, 1 deletions
diff --git a/lib/Target/Hexagon/HexagonTargetMachine.cpp b/lib/Target/Hexagon/HexagonTargetMachine.cpp
index 6c418854a4..319eab2a25 100644
--- a/lib/Target/Hexagon/HexagonTargetMachine.cpp
+++ b/lib/Target/Hexagon/HexagonTargetMachine.cpp
@@ -1,4 +1,4 @@
-//===- HexagonTargetMachine.cpp - Define TargetMachine for Hexagon --------===//
+//===-- HexagonTargetMachine.cpp - Define TargetMachine for Hexagon -------===//
//
// The LLVM Compiler Infrastructure
//
@@ -7,6 +7,7 @@
//
//===----------------------------------------------------------------------===//
//
+// Implements the info about Hexagon target spec.
//
//===----------------------------------------------------------------------===//