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authorBrendon Cahoon <bcahoon@codeaurora.org>2012-05-11 19:56:59 +0000
committerBrendon Cahoon <bcahoon@codeaurora.org>2012-05-11 19:56:59 +0000
commit6d532d8860c07a3af3b66339f55ab91b4618ca7d (patch)
tree60b50fe7ba7f82abdddb0ac1890cf60ba9319d30 /lib/Target/Hexagon/HexagonISelDAGToDAG.cpp
parente1093e5503060b3031980dc14a141c3236108c50 (diff)
Hexagon constant extender support.
Patch by Jyotsna Verma. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156634 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Hexagon/HexagonISelDAGToDAG.cpp')
-rw-r--r--lib/Target/Hexagon/HexagonISelDAGToDAG.cpp31
1 files changed, 25 insertions, 6 deletions
diff --git a/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp b/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp
index 5499134eb9..a22555d8b6 100644
--- a/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp
+++ b/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp
@@ -94,6 +94,7 @@ public:
SDNode *SelectConstant(SDNode *N);
SDNode *SelectConstantFP(SDNode *N);
SDNode *SelectAdd(SDNode *N);
+ bool isConstExtProfitable(SDNode *N) const;
// Include the pieces autogenerated from the target description.
#include "HexagonGenDAGISel.inc"
@@ -312,9 +313,13 @@ SDNode *HexagonDAGToDAGISel::SelectBaseOffsetLoad(LoadSDNode *LD, DebugLoc dl) {
cast<GlobalAddressSDNode>(Base)->getGlobal();
SDValue TargAddr =
CurDAG->getTargetGlobalAddress(GV, dl, PointerTy, 0);
- SDNode* NewBase = CurDAG->getMachineNode(Hexagon::CONST32_set,
- dl, PointerTy,
- TargAddr);
+ SDNode* NewBase;
+ if (Subtarget.hasV4TOps())
+ NewBase = CurDAG->getMachineNode(Hexagon::TFRI_V4,
+ dl, PointerTy, TargAddr);
+ else
+ NewBase = CurDAG->getMachineNode(Hexagon::CONST32_set,
+ dl, PointerTy, TargAddr);
// Figure out base + offset opcode
if (LoadedVT == MVT::i64) Opcode = Hexagon::LDrid_indexed;
else if (LoadedVT == MVT::i32) Opcode = Hexagon::LDriw_indexed;
@@ -686,9 +691,13 @@ SDNode *HexagonDAGToDAGISel::SelectBaseOffsetStore(StoreSDNode *ST,
cast<GlobalAddressSDNode>(Base)->getGlobal();
SDValue TargAddr =
CurDAG->getTargetGlobalAddress(GV, dl, PointerTy, 0);
- SDNode* NewBase = CurDAG->getMachineNode(Hexagon::CONST32_set,
- dl, PointerTy,
- TargAddr);
+ SDNode* NewBase;
+ if (Subtarget.hasV4TOps())
+ NewBase = CurDAG->getMachineNode(Hexagon::TFRI_V4,
+ dl, PointerTy, TargAddr);
+ else
+ NewBase = CurDAG->getMachineNode(Hexagon::CONST32_set,
+ dl, PointerTy, TargAddr);
// Figure out base + offset opcode
if (StoredVT == MVT::i64) Opcode = Hexagon::STrid_indexed;
@@ -1507,3 +1516,13 @@ SelectInlineAsmMemoryOperand(const SDValue &Op, char ConstraintCode,
OutOps.push_back(Op1);
return false;
}
+
+bool HexagonDAGToDAGISel::isConstExtProfitable(SDNode *N) const {
+ unsigned UseCount = 0;
+ for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) {
+ UseCount++;
+ }
+
+ return (UseCount <= 1);
+
+}