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authorJakob Stoklund Olesen <stoklund@2pi.dk>2012-05-07 22:10:26 +0000
committerJakob Stoklund Olesen <stoklund@2pi.dk>2012-05-07 22:10:26 +0000
commit397fc4874efe9c17e737d4c5c50bd19dc3bf27f5 (patch)
tree93cf5a55f62e3810930cdfedc4b567322a7dd454 /lib/Target/Hexagon/HexagonISelDAGToDAG.cpp
parent9b23d57dc480a34eee9867be52b9c2022e8979f6 (diff)
Add an MF argument to TRI::getPointerRegClass() and TII::getRegClass().
The getPointerRegClass() hook can return register classes that depend on the calling convention of the current function (ptr_rc_tailcall). So far, we have been able to infer the calling convention from the subtarget alone, but as we add support for multiple calling conventions per target, that no longer works. Patch by Yiannis Tsiouris! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156328 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Hexagon/HexagonISelDAGToDAG.cpp')
-rw-r--r--lib/Target/Hexagon/HexagonISelDAGToDAG.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp b/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp
index cb6b75aadd..b50cadd297 100644
--- a/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp
+++ b/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp
@@ -1128,7 +1128,7 @@ SDNode *HexagonDAGToDAGISel::SelectIntrinsicWOChain(SDNode *N) {
// For immediates, lower it.
for (unsigned i = 1; i < N->getNumOperands(); ++i) {
SDNode *Arg = N->getOperand(i).getNode();
- const TargetRegisterClass *RC = TII->getRegClass(MCID, i, TRI);
+ const TargetRegisterClass *RC = TII->getRegClass(MCID, i, TRI, *MF);
if (RC == &Hexagon::IntRegsRegClass ||
RC == &Hexagon::DoubleRegsRegClass) {