diff options
| author | Chandler Carruth <chandlerc@gmail.com> | 2012-04-23 18:25:57 +0000 |
|---|---|---|
| committer | Chandler Carruth <chandlerc@gmail.com> | 2012-04-23 18:25:57 +0000 |
| commit | d410eaba04211d53a523a518a5e315eb24c1072f (patch) | |
| tree | 4f1dce3ce0466afddc686b95b2432690f3086b95 /lib/Target/Hexagon/Hexagon.td | |
| parent | 15e56ad8855ff2d135a79efa71b540852acf3b97 (diff) | |
Revert r155365, r155366, and r155367. All three of these have regression
test suite failures. The failures occur at each stage, and only get
worse, so I'm reverting all of them.
Please resubmit these patches, one at a time, after verifying that the
regression test suite passes. Never submit a patch without running the
regression test suite.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155372 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Hexagon/Hexagon.td')
| -rw-r--r-- | lib/Target/Hexagon/Hexagon.td | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/lib/Target/Hexagon/Hexagon.td b/lib/Target/Hexagon/Hexagon.td index 8201de3f2a..4a50d16093 100644 --- a/lib/Target/Hexagon/Hexagon.td +++ b/lib/Target/Hexagon/Hexagon.td @@ -28,8 +28,6 @@ def ArchV3 : SubtargetFeature<"v3", "HexagonArchVersion", "V3", "Hexagon v3">; def ArchV4 : SubtargetFeature<"v4", "HexagonArchVersion", "V4", "Hexagon v4">; -def ArchV5 : SubtargetFeature<"v5", "HexagonArchVersion", "V5", - "Hexagon v5">; //===----------------------------------------------------------------------===// // Register File, Calling Conv, Instruction Descriptions @@ -54,8 +52,6 @@ class Proc<string Name, ProcessorItineraries Itin, def : Proc<"hexagonv2", HexagonItineraries, [ArchV2]>; def : Proc<"hexagonv3", HexagonItineraries, [ArchV2, ArchV3]>; def : Proc<"hexagonv4", HexagonItinerariesV4, [ArchV2, ArchV3, ArchV4]>; -def : Proc<"hexagonv5", HexagonItinerariesV4, [ArchV2, ArchV3, ArchV4, ArchV5]>; - // Hexagon Uses the MC printer for assembler output, so make sure the TableGen // AsmWriter bits get associated with the correct class. |