diff options
| author | Kalle Raiskila <kalle.raiskila@nokia.com> | 2011-01-11 09:07:54 +0000 |
|---|---|---|
| committer | Kalle Raiskila <kalle.raiskila@nokia.com> | 2011-01-11 09:07:54 +0000 |
| commit | 76020ed6f33e3b3943b25c8b5e111afece086f5c (patch) | |
| tree | a82e35de61771d5249f1ae9eef88b8981b69e319 /lib/Target/CellSPU/SPUTargetMachine.h | |
| parent | 87376839a651ed1221dd46762701f13ad6ece0eb (diff) | |
Add a "nop filler" pass to SPU.
Filling no-ops is done just before emitting of assembly,
when the instruction stream is final. No-ops are inserted
to align the instructions so the dual-issue of the pipeline
is utilized. This speeds up generated code with a minimum of
1% on a select set of algorithms.
This pass may be redundant if the instruction scheduler and
all subsequent passes that modify the instruction stream
(prolog+epilog inserter, register scavenger, are there others?)
are made aware of the instruction alignments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123226 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/CellSPU/SPUTargetMachine.h')
| -rw-r--r-- | lib/Target/CellSPU/SPUTargetMachine.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/lib/Target/CellSPU/SPUTargetMachine.h b/lib/Target/CellSPU/SPUTargetMachine.h index 6e46757612..75abd5eb3f 100644 --- a/lib/Target/CellSPU/SPUTargetMachine.h +++ b/lib/Target/CellSPU/SPUTargetMachine.h @@ -82,6 +82,7 @@ public: // Pass Pipeline Configuration virtual bool addInstSelector(PassManagerBase &PM, CodeGenOpt::Level OptLevel); + virtual bool addPreEmitPass(PassManagerBase &, CodeGenOpt::Level); }; } // end namespace llvm |