diff options
author | Scott Michel <scottm@aero.org> | 2007-12-05 01:24:05 +0000 |
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committer | Scott Michel <scottm@aero.org> | 2007-12-05 01:24:05 +0000 |
commit | 564427eabdc4cb25e1bc9eb15c589e9451fc29a2 (patch) | |
tree | 50a85af544d92fe62154ff2a5b7bea2553a0e813 /lib/Target/CellSPU/SPUTargetMachine.cpp | |
parent | db1e30272c06daba86c896e56a7d225a15c93b98 (diff) |
Main CellSPU backend files checked in. Intrinsics and autoconf files
remain.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44595 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/CellSPU/SPUTargetMachine.cpp')
-rw-r--r-- | lib/Target/CellSPU/SPUTargetMachine.cpp | 87 |
1 files changed, 87 insertions, 0 deletions
diff --git a/lib/Target/CellSPU/SPUTargetMachine.cpp b/lib/Target/CellSPU/SPUTargetMachine.cpp new file mode 100644 index 0000000000..068fd00348 --- /dev/null +++ b/lib/Target/CellSPU/SPUTargetMachine.cpp @@ -0,0 +1,87 @@ +//===-- SPUTargetMachine.cpp - Define TargetMachine for Cell SPU ----------===// +// +// The LLVM Compiler Infrastructure +// +// This file was developed by a team from the Computer Systems Research +// Department at The Aerospace Corporation. +// +// See README.txt for details. +// +//===----------------------------------------------------------------------===// +// +// Top-level implementation for the Cell SPU target. +// +//===----------------------------------------------------------------------===// + +#include "SPU.h" +#include "SPURegisterNames.h" +#include "SPUTargetAsmInfo.h" +#include "SPUTargetMachine.h" +#include "llvm/Module.h" +#include "llvm/PassManager.h" +#include "llvm/Target/TargetMachineRegistry.h" + +using namespace llvm; + +namespace { + // Register the targets + RegisterTarget<SPUTargetMachine> + CELLSPU("cellspu", " STI CBEA Cell SPU"); +} + +const std::pair<unsigned, int> * +SPUFrameInfo::getCalleeSaveSpillSlots(unsigned &NumEntries) const { + NumEntries = 1; + return &LR[0]; +} + +const TargetAsmInfo * +SPUTargetMachine::createTargetAsmInfo() const +{ + return new SPUTargetAsmInfo(*this); +} + +unsigned +SPUTargetMachine::getModuleMatchQuality(const Module &M) +{ + // We strongly match "spu-*" or "cellspu-*". + std::string TT = M.getTargetTriple(); + if ((TT.size() == 3 && std::string(TT.begin(), TT.begin()+3) == "spu") + || (TT.size() == 7 && std::string(TT.begin(), TT.begin()+7) == "cellspu") + || (TT.size() >= 4 && std::string(TT.begin(), TT.begin()+4) == "spu-") + || (TT.size() >= 8 && std::string(TT.begin(), TT.begin()+8) == "cellspu-")) + return 20; + + return 0; // No match at all... +} + +SPUTargetMachine::SPUTargetMachine(const Module &M, const std::string &FS) + : Subtarget(*this, M, FS), + DataLayout(Subtarget.getTargetDataString()), + InstrInfo(*this), + FrameInfo(*this), + TLInfo(*this), + InstrItins(Subtarget.getInstrItineraryData()) +{ + // For the time being, use static relocations, since there's really no + // support for PIC yet. + setRelocationModel(Reloc::Static); +} + +//===----------------------------------------------------------------------===// +// Pass Pipeline Configuration +//===----------------------------------------------------------------------===// + +bool +SPUTargetMachine::addInstSelector(FunctionPassManager &PM, bool Fast) +{ + // Install an instruction selector. + PM.add(createSPUISelDag(*this)); + return false; +} + +bool SPUTargetMachine::addAssemblyEmitter(FunctionPassManager &PM, bool Fast, + std::ostream &Out) { + PM.add(createSPUAsmPrinterPass(Out, *this)); + return false; +} |