aboutsummaryrefslogtreecommitdiff
path: root/lib/Target/CellSPU/SPUSubtarget.cpp
diff options
context:
space:
mode:
authorEvan Cheng <evan.cheng@apple.com>2011-07-01 21:01:15 +0000
committerEvan Cheng <evan.cheng@apple.com>2011-07-01 21:01:15 +0000
commit5b1b4489cf3a0f56f8be0673fc5cc380a32d277b (patch)
tree3bff4e3dc0b54a8d194d2c8714ac18873c32e820 /lib/Target/CellSPU/SPUSubtarget.cpp
parent94214703d97d8d9dfca88174ffc7e94820a85e62 (diff)
Rename TargetSubtarget to TargetSubtargetInfo for consistency.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134259 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/CellSPU/SPUSubtarget.cpp')
-rw-r--r--lib/Target/CellSPU/SPUSubtarget.cpp6
1 files changed, 3 insertions, 3 deletions
diff --git a/lib/Target/CellSPU/SPUSubtarget.cpp b/lib/Target/CellSPU/SPUSubtarget.cpp
index 512876781a..4e136a4709 100644
--- a/lib/Target/CellSPU/SPUSubtarget.cpp
+++ b/lib/Target/CellSPU/SPUSubtarget.cpp
@@ -7,7 +7,7 @@
//
//===----------------------------------------------------------------------===//
//
-// This file implements the CellSPU-specific subclass of TargetSubtarget.
+// This file implements the CellSPU-specific subclass of TargetSubtargetInfo.
//
//===----------------------------------------------------------------------===//
@@ -49,9 +49,9 @@ void SPUSubtarget::SetJITMode() {
/// Enable PostRA scheduling for optimization levels -O2 and -O3.
bool SPUSubtarget::enablePostRAScheduler(
CodeGenOpt::Level OptLevel,
- TargetSubtarget::AntiDepBreakMode& Mode,
+ TargetSubtargetInfo::AntiDepBreakMode& Mode,
RegClassVector& CriticalPathRCs) const {
- Mode = TargetSubtarget::ANTIDEP_CRITICAL;
+ Mode = TargetSubtargetInfo::ANTIDEP_CRITICAL;
// CriticalPathsRCs seems to be the set of
// RegisterClasses that antidep breakings are performed for.
// Do it for all register classes