Let me introduce you to the early stages of the llvm backend for the alpha processor

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19764 91177308-0d34-0410-b5e6-96231b3b80d8

1 files changed, 54 insertions, 0 deletions

diff --git a/lib/Target/Alpha/AlphaTargetMachine.h b/lib/Target/Alpha/AlphaTargetMachine.h
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+++ b/lib/Target/Alpha/AlphaTargetMachine.h
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+//===-- AlphaTargetMachine.h - Define TargetMachine for PowerPC -*- C++ -*-=//
+// 
+//                     The LLVM Compiler Infrastructure
+//
+// This file was developed by the LLVM research group and is distributed under
+// the University of Illinois Open Source License. See LICENSE.TXT for details.
+// 
+//===----------------------------------------------------------------------===//
+// 
+// This file declares the Alpha-specific subclass of TargetMachine.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef ALPHA_TARGETMACHINE_H
+#define ALPHA_TARGETMACHINE_H
+
+#include "llvm/Target/TargetMachine.h"
+#include "llvm/Target/TargetFrameInfo.h"
+#include "llvm/PassManager.h"
+#include "AlphaInstrInfo.h"
+//#include "AlphaJITInfo.h"
+
+namespace llvm {
+
+class GlobalValue;
+class IntrinsicLowering;
+
+class AlphaTargetMachine : public TargetMachine {
+  AlphaInstrInfo InstrInfo;
+  TargetFrameInfo FrameInfo;
+  //  AlphaJITInfo JITInfo;
+
+public:
+  AlphaTargetMachine(const Module &M, IntrinsicLowering *IL);
+  
+  virtual const AlphaInstrInfo *getInstrInfo() const { return &InstrInfo; }    
+  virtual const TargetFrameInfo  *getFrameInfo() const { return &FrameInfo; }
+  virtual const MRegisterInfo *getRegisterInfo() const {
+    return &InstrInfo.getRegisterInfo();
+  }
+  //  virtual TargetJITInfo *getJITInfo() {
+  //    return &JITInfo;
+  //  }
+ 
+  virtual bool addPassesToEmitMachineCode(FunctionPassManager &PM,
+					  MachineCodeEmitter &MCE);
+  
+  virtual bool addPassesToEmitAssembly(PassManager &PM, std::ostream &Out);
+  
+};
+
+} // end namespace llvm
+
+#endif