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authorBill Wendling <isanbard@gmail.com>2009-04-29 00:15:41 +0000
committerBill Wendling <isanbard@gmail.com>2009-04-29 00:15:41 +0000
commitbe8cc2a3dedeb7685f07e68cdc4b9502eb97eb2b (patch)
tree61b5516b5232ee39d0cfb04473b2cc8076464a1c /lib/Target/Alpha/AlphaTargetMachine.cpp
parenta24d1b155831d25f543e0e4ece9b572cefda2f17 (diff)
Second attempt:
Massive check in. This changes the "-fast" flag to "-O#" in llc. If you want to use the old behavior, the flag is -O0. This change allows for finer-grained control over which optimizations are run at different -O levels. Most of this work was pretty mechanical. The majority of the fixes came from verifying that a "fast" variable wasn't used anymore. The JIT still uses a "Fast" flag. I'll change the JIT with a follow-up patch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70343 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Alpha/AlphaTargetMachine.cpp')
-rw-r--r--lib/Target/Alpha/AlphaTargetMachine.cpp19
1 files changed, 11 insertions, 8 deletions
diff --git a/lib/Target/Alpha/AlphaTargetMachine.cpp b/lib/Target/Alpha/AlphaTargetMachine.cpp
index cae91d8c4e..7a87612038 100644
--- a/lib/Target/Alpha/AlphaTargetMachine.cpp
+++ b/lib/Target/Alpha/AlphaTargetMachine.cpp
@@ -76,31 +76,34 @@ AlphaTargetMachine::AlphaTargetMachine(const Module &M, const std::string &FS)
// Pass Pipeline Configuration
//===----------------------------------------------------------------------===//
-bool AlphaTargetMachine::addInstSelector(PassManagerBase &PM, bool Fast) {
+bool AlphaTargetMachine::addInstSelector(PassManagerBase &PM,
+ unsigned OptLevel) {
PM.add(createAlphaISelDag(*this));
return false;
}
-bool AlphaTargetMachine::addPreEmitPass(PassManagerBase &PM, bool Fast) {
+bool AlphaTargetMachine::addPreEmitPass(PassManagerBase &PM,
+ unsigned OptLevel) {
// Must run branch selection immediately preceding the asm printer
PM.add(createAlphaBranchSelectionPass());
return false;
}
-bool AlphaTargetMachine::addAssemblyEmitter(PassManagerBase &PM, bool Fast,
+bool AlphaTargetMachine::addAssemblyEmitter(PassManagerBase &PM,
+ unsigned OptLevel,
bool Verbose,
raw_ostream &Out) {
PM.add(createAlphaLLRPPass(*this));
- PM.add(createAlphaCodePrinterPass(Out, *this, Fast, Verbose));
+ PM.add(createAlphaCodePrinterPass(Out, *this, OptLevel, Verbose));
return false;
}
-bool AlphaTargetMachine::addCodeEmitter(PassManagerBase &PM, bool Fast,
+bool AlphaTargetMachine::addCodeEmitter(PassManagerBase &PM, unsigned OptLevel,
bool DumpAsm, MachineCodeEmitter &MCE) {
PM.add(createAlphaCodeEmitterPass(*this, MCE));
if (DumpAsm)
- PM.add(createAlphaCodePrinterPass(errs(), *this, Fast, true));
+ PM.add(createAlphaCodePrinterPass(errs(), *this, OptLevel, true));
return false;
}
bool AlphaTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
- bool Fast, bool DumpAsm,
+ unsigned OptLevel, bool DumpAsm,
MachineCodeEmitter &MCE) {
- return addCodeEmitter(PM, Fast, DumpAsm, MCE);
+ return addCodeEmitter(PM, OptLevel, DumpAsm, MCE);
}