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authorAndrew Lenharth <andrewl@lenharth.org>2005-01-24 18:45:41 +0000
committerAndrew Lenharth <andrewl@lenharth.org>2005-01-24 18:45:41 +0000
commit886470efec48705831d950c41f35482bfc9ef6ca (patch)
treef6d3acaa39706bb8cfb0dfe38b833317103ac17a /lib/Target/Alpha/AlphaTargetMachine.cpp
parent01269524ce08523a06f736e16df84bf536cfe901 (diff)
include prune and JIT prune
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19814 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Alpha/AlphaTargetMachine.cpp')
-rw-r--r--lib/Target/Alpha/AlphaTargetMachine.cpp36
1 files changed, 1 insertions, 35 deletions
diff --git a/lib/Target/Alpha/AlphaTargetMachine.cpp b/lib/Target/Alpha/AlphaTargetMachine.cpp
index baf3ca8207..9ad26aeb2f 100644
--- a/lib/Target/Alpha/AlphaTargetMachine.cpp
+++ b/lib/Target/Alpha/AlphaTargetMachine.cpp
@@ -1,4 +1,4 @@
-//===-- AlphaTargetMachine.cpp - Define TargetMachine for Alpha -------===//
+//===-- AlphaTargetMachine.cpp - Define TargetMachine for Alpha -----------===//
//
// The LLVM Compiler Infrastructure
//
@@ -12,14 +12,10 @@
#include "Alpha.h"
#include "AlphaTargetMachine.h"
-#include "llvm/Module.h"
-#include "llvm/CodeGen/IntrinsicLowering.h"
-#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/Passes.h"
#include "llvm/Target/TargetOptions.h"
#include "llvm/Target/TargetMachineRegistry.h"
#include "llvm/Transforms/Scalar.h"
-#include "llvm/Support/CommandLine.h"
#include <iostream>
using namespace llvm;
@@ -31,7 +27,6 @@ namespace {
AlphaTargetMachine::AlphaTargetMachine( const Module &M, IntrinsicLowering *IL)
: TargetMachine("alpha", IL, true),
FrameInfo(TargetFrameInfo::StackGrowsDown, 8, 0) //TODO: check these
- //JITInfo(*this)
{}
bool AlphaTargetMachine::addPassesToEmitMachineCode(FunctionPassManager &PM,
@@ -57,8 +52,6 @@ bool AlphaTargetMachine::addPassesToEmitAssembly(PassManager &PM,
// FIXME: Implement the switch instruction in the instruction selector!
PM.add(createLowerSwitchPass());
- PM.add(createLowerConstantExpressionsPass());
-
// Make sure that no unreachable blocks are instruction selected.
PM.add(createUnreachableBlockEliminationPass());
@@ -82,30 +75,3 @@ bool AlphaTargetMachine::addPassesToEmitAssembly(PassManager &PM,
PM.add(createMachineCodeDeleter());
return false;
}
-
-//void AlphaJITInfo::addPassesToJITCompile(FunctionPassManager &PM) {
-// // FIXME: Implement efficient support for garbage collection intrinsics.
-// PM.add(createLowerGCPass());
-
-// // FIXME: Implement the invoke/unwind instructions!
-// PM.add(createLowerInvokePass());
-
-// // FIXME: Implement the switch instruction in the instruction selector!
-// PM.add(createLowerSwitchPass());
-
-// PM.add(createLowerConstantExpressionsPass());
-
-// // Make sure that no unreachable blocks are instruction selected.
-// PM.add(createUnreachableBlockEliminationPass());
-
-// PM.add(createPPC32ISelSimple(TM));
-// PM.add(createRegisterAllocator());
-// PM.add(createPrologEpilogCodeInserter());
-
-// // Must run branch selection immediately preceding the asm printer
-// PM.add(createPPCBranchSelectionPass());
-
-// if (PrintMachineCode)
-// PM.add(createMachineFunctionPrinterPass(&std::cerr));
-//}
-