diff options
author | Andrew Lenharth <andrewl@lenharth.org> | 2006-01-13 18:49:47 +0000 |
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committer | Andrew Lenharth <andrewl@lenharth.org> | 2006-01-13 18:49:47 +0000 |
commit | 512c77e53225ab4c9534ba32431d1d0873b64eb6 (patch) | |
tree | dde6fa1a3b97dc98e6408a77f020411c9cc59089 /lib/Target/Alpha/AlphaTargetMachine.cpp | |
parent | a4c29d20376f4736325a493cf39cda36bed62318 (diff) |
make DAG isel the default
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25282 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Alpha/AlphaTargetMachine.cpp')
-rw-r--r-- | lib/Target/Alpha/AlphaTargetMachine.cpp | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/lib/Target/Alpha/AlphaTargetMachine.cpp b/lib/Target/Alpha/AlphaTargetMachine.cpp index 21a7f98981..ea2348080c 100644 --- a/lib/Target/Alpha/AlphaTargetMachine.cpp +++ b/lib/Target/Alpha/AlphaTargetMachine.cpp @@ -29,8 +29,8 @@ namespace { } namespace llvm { - cl::opt<bool> EnableAlphaDAG("enable-dag-isel-for-alpha", - cl::desc("Enable DAG ISEL for Alpha (beta option!)"), + cl::opt<bool> DisableAlphaDAG("disable-alpha-dag-isel", + cl::desc("Disable DAG ISEL for Alpha"), cl::Hidden); } @@ -94,7 +94,7 @@ bool AlphaTargetMachine::addPassesToEmitFile(PassManager &PM, // Make sure that no unreachable blocks are instruction selected. PM.add(createUnreachableBlockEliminationPass()); - if (EnableAlphaDAG) + if (!DisableAlphaDAG) PM.add(createAlphaISelDag(*this)); else PM.add(createAlphaPatternInstructionSelector(*this)); |