diff options
author | Andrew Lenharth <andrewl@lenharth.org> | 2005-07-23 07:46:48 +0000 |
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committer | Andrew Lenharth <andrewl@lenharth.org> | 2005-07-23 07:46:48 +0000 |
commit | f075cac445c9aa2e7d251d7ca2eb0edc3355e9ce (patch) | |
tree | 97a018c9e83218574831915908cee51a1b0619c7 /lib/Target/Alpha/AlphaISelPattern.cpp | |
parent | aa68f7fa0920bd7eaf61e1f9a838f8aeb4f61b2a (diff) |
fix compile error
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22508 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Alpha/AlphaISelPattern.cpp')
-rw-r--r-- | lib/Target/Alpha/AlphaISelPattern.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/Alpha/AlphaISelPattern.cpp b/lib/Target/Alpha/AlphaISelPattern.cpp index 1b764061b0..6d5dbeafc8 100644 --- a/lib/Target/Alpha/AlphaISelPattern.cpp +++ b/lib/Target/Alpha/AlphaISelPattern.cpp @@ -2083,7 +2083,7 @@ unsigned AlphaISel::SelectExpr(SDOperand N) { { int64_t val = (int64_t)cast<ConstantSDNode>(N)->getValue(); int zero_extend_top = 0; - if (val > 0 && (val & 0xFFFFFFFF00000000) == 0 && + if (val > 0 && (val & 0xFFFFFFFF00000000ULL) == 0 && ((int32_t)val < 0)) { //try a small load and zero extend val = (int32_t)val; |