diff options
| author | Chris Lattner <sabre@nondot.org> | 2005-07-10 00:29:18 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2005-07-10 00:29:18 +0000 |
| commit | 9fadb4c1c0a6d223aa468f9f72f8c2562dc66839 (patch) | |
| tree | 48af1069d3858defa9aa70f7f205f8c27ee2ebae /lib/Target/Alpha/AlphaISelPattern.cpp | |
| parent | f7db8c69a12582c7d1ff7c5f25c948dca2dbf7dc (diff) | |
Change TRUNCSTORE to use a VTSDNode operand instead of being an MVTSTDNode
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22366 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Alpha/AlphaISelPattern.cpp')
| -rw-r--r-- | lib/Target/Alpha/AlphaISelPattern.cpp | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/lib/Target/Alpha/AlphaISelPattern.cpp b/lib/Target/Alpha/AlphaISelPattern.cpp index 32259631ce..aeb15a02f5 100644 --- a/lib/Target/Alpha/AlphaISelPattern.cpp +++ b/lib/Target/Alpha/AlphaISelPattern.cpp @@ -419,7 +419,7 @@ SDOperand AlphaTargetLowering::LowerVAStart(SDOperand Chain, SDOperand VAListP, DAG.getConstant(8, MVT::i64)); return DAG.getNode(ISD::TRUNCSTORE, MVT::Other, S1, DAG.getConstant(VarArgsOffset, MVT::i64), SA2, - DAG.getSrcValue(VAListV, 8), MVT::i32); + DAG.getSrcValue(VAListV, 8), DAG.getValueType(MVT::i32)); } std::pair<SDOperand,SDOperand> AlphaTargetLowering:: @@ -457,7 +457,8 @@ LowerVAArg(SDOperand Chain, SDOperand VAListP, Value *VAListV, DAG.getConstant(8, MVT::i64)); SDOperand Update = DAG.getNode(ISD::TRUNCSTORE, MVT::Other, Result.getValue(1), NewOffset, - Tmp, DAG.getSrcValue(VAListV, 8), MVT::i32); + Tmp, DAG.getSrcValue(VAListV, 8), + DAG.getValueType(MVT::i32)); Result = DAG.getNode(ISD::TRUNCATE, getValueType(ArgTy), Result); return std::make_pair(Result, Update); @@ -478,7 +479,8 @@ LowerVACopy(SDOperand Chain, SDOperand SrcP, Value *SrcV, SDOperand DestP, SDOperand NPD = DAG.getNode(ISD::ADD, MVT::i64, DestP, DAG.getConstant(8, MVT::i64)); return DAG.getNode(ISD::TRUNCSTORE, MVT::Other, Val.getValue(1), - Val, NPD, DAG.getSrcValue(DestV, 8), MVT::i32); + Val, NPD, DAG.getSrcValue(DestV, 8), + DAG.getValueType(MVT::i32)); } namespace { @@ -2283,7 +2285,7 @@ void AlphaISel::Select(SDOperand N) { case MVT::f32: Opc = Alpha::STS; break; } } else { //ISD::TRUNCSTORE - switch(cast<MVTSDNode>(Node)->getExtraValueType()) { + switch(cast<VTSDNode>(Node->getOperand(4))->getVT()) { default: assert(0 && "unknown Type in store"); case MVT::i1: //FIXME: DAG does not promote this load case MVT::i8: Opc = Alpha::STB; break; |