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| author | Andrew Lenharth <andrewl@lenharth.org> | 2005-05-31 18:42:18 +0000 |
|---|---|---|
| committer | Andrew Lenharth <andrewl@lenharth.org> | 2005-05-31 18:42:18 +0000 |
| commit | 591ec57c094b2524832fdc940cb387918d4bf976 (patch) | |
| tree | 1d60812517d34af5e0d1ebab843f086436e5d83d /lib/Target/Alpha/AlphaISelPattern.cpp | |
| parent | 14f30c927dd6ad12974df653c681d21524c532f1 (diff) | |
switch to the new live in thing. Really, this time it works
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22187 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Alpha/AlphaISelPattern.cpp')
| -rw-r--r-- | lib/Target/Alpha/AlphaISelPattern.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/Alpha/AlphaISelPattern.cpp b/lib/Target/Alpha/AlphaISelPattern.cpp index deed1905d6..453754ce68 100644 --- a/lib/Target/Alpha/AlphaISelPattern.cpp +++ b/lib/Target/Alpha/AlphaISelPattern.cpp @@ -210,7 +210,7 @@ AlphaTargetLowering::LowerArguments(Function &F, SelectionDAG &DAG) case MVT::i16: case MVT::i32: case MVT::i64: - args_int[count] = AddLiveIn(MF, args_int[count], getRegClassFor(VT)); + args_int[count] = AddLiveIn(MF, args_int[count], getRegClassFor(MVT::i64)); argt = DAG.getCopyFromReg(args_int[count], VT, DAG.getRoot()); if (VT != MVT::i64) argt = DAG.getNode(ISD::TRUNCATE, VT, argt); |