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authorKevin Enderby <enderby@apple.com>2012-05-04 22:02:27 +0000
committerKevin Enderby <enderby@apple.com>2012-05-04 22:02:27 +0000
commitce734d5ffe53273caa7df762f70803050b0ce929 (patch)
tree7a23b1f757ef1cd7f54a5e0da82fa69af8cd640b /lib/Target/ARM
parent917644d0c347950f8e77f52797cb89ceb771215d (diff)
Fix a bug in the ARM disassembler for wide branch conditional instructions
where the symbolic operand's displacement was incorrectly shifted left by 1. rdar://11387046 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156212 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM')
-rw-r--r--lib/Target/ARM/Disassembler/ARMDisassembler.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
index 80b2b235be..1363b85ee5 100644
--- a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
+++ b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
@@ -3016,7 +3016,7 @@ static DecodeStatus DecodeThumbBROperand(MCInst &Inst, unsigned Val,
static DecodeStatus DecodeT2BROperand(MCInst &Inst, unsigned Val,
uint64_t Address, const void *Decoder) {
- if (!tryAddingSymbolicOperand(Address, Address + SignExtend32<22>(Val<<1) + 4,
+ if (!tryAddingSymbolicOperand(Address, Address + SignExtend32<22>(Val) + 4,
true, 4, Inst, Decoder))
Inst.addOperand(MCOperand::CreateImm(SignExtend32<21>(Val)));
return MCDisassembler::Success;