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| author | Jim Grosbach <grosbach@apple.com> | 2011-11-29 23:33:40 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2011-11-29 23:33:40 +0000 |
| commit | bd1cff5b2c367459329b291b929c9b645470b320 (patch) | |
| tree | c85321497ade9e075e6f0b44412becdf34fa754d /lib/Target/ARM | |
| parent | 1ec7bf0c0d82f091b66aa52e63c99a538fe4653b (diff) | |
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145456 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM')
| -rw-r--r-- | lib/Target/ARM/ARMInstrNEON.td | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/lib/Target/ARM/ARMInstrNEON.td b/lib/Target/ARM/ARMInstrNEON.td index 99d8b3af64..46732682c8 100644 --- a/lib/Target/ARM/ARMInstrNEON.td +++ b/lib/Target/ARM/ARMInstrNEON.td @@ -74,6 +74,7 @@ def VectorIndex32 : Operand<i32>, ImmLeaf<i32, [{ let MIOperandInfo = (ops i32imm); } +// Register list of one D register. def VecListOneDAsmOperand : AsmOperandClass { let Name = "VecListOneD"; let ParserMethod = "parseVectorList"; |