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authorJakob Stoklund Olesen <stoklund@2pi.dk>2012-02-17 19:23:15 +0000
committerJakob Stoklund Olesen <stoklund@2pi.dk>2012-02-17 19:23:15 +0000
commit2420b558de5d291d8503c1339004e5b5bf99a48a (patch)
tree90983791e41c71c8709d9bf8aec4fa5f6419712c /lib/Target/ARM/Thumb2InstrInfo.cpp
parentfc0d7400bc44b52d0446933290dfeef2f9586293 (diff)
Handle regmask operands in ARMInstrInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150833 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/Thumb2InstrInfo.cpp')
-rw-r--r--lib/Target/ARM/Thumb2InstrInfo.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/ARM/Thumb2InstrInfo.cpp b/lib/Target/ARM/Thumb2InstrInfo.cpp
index 7ec3c0e0c4..dcf5308c62 100644
--- a/lib/Target/ARM/Thumb2InstrInfo.cpp
+++ b/lib/Target/ARM/Thumb2InstrInfo.cpp
@@ -586,7 +586,7 @@ Thumb2InstrInfo::scheduleTwoAddrSource(MachineInstr *SrcMI,
ARMCC::CondCodes NCC = llvm::getInstrPredicate(NMI, PredReg);
if (!(NCC == CC || NCC == OCC) ||
NMI->modifiesRegister(SrcReg, &TRI) ||
- NMI->definesRegister(ARM::CPSR))
+ NMI->modifiesRegister(ARM::CPSR, &TRI))
break;
if (++NumInsts == 4)
// Too many in a row!