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authorEvan Cheng <evan.cheng@apple.com>2010-05-11 01:19:40 +0000
committerEvan Cheng <evan.cheng@apple.com>2010-05-11 01:19:40 +0000
commit0ce537a9db2da085ab50b15d2454cb7cac460eb7 (patch)
tree3956c0627a8627afb7d67ee5ad927eb9bfa2ebc2 /lib/Target/ARM/NEONPreAllocPass.cpp
parent81043ee5dc4cca470db8d45e080ba0a38efbffc2 (diff)
Model some vst3 and vst4 with reg_sequence.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103453 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/NEONPreAllocPass.cpp')
-rw-r--r--lib/Target/ARM/NEONPreAllocPass.cpp16
1 files changed, 10 insertions, 6 deletions
diff --git a/lib/Target/ARM/NEONPreAllocPass.cpp b/lib/Target/ARM/NEONPreAllocPass.cpp
index 538247a892..5a5dd29a34 100644
--- a/lib/Target/ARM/NEONPreAllocPass.cpp
+++ b/lib/Target/ARM/NEONPreAllocPass.cpp
@@ -392,15 +392,19 @@ NEONPreAllocPass::FormsRegSequence(MachineInstr *MI,
VirtReg = DefMI->getOperand(1).getReg();
if (LastSrcReg && LastSrcReg != VirtReg)
return false;
+ LastSrcReg = VirtReg;
const TargetRegisterClass *RC = MRI->getRegClass(VirtReg);
- if (NumRegs == 2) {
- if (RC != ARM::QPRRegisterClass)
- return false;
- } else if (RC != ARM::QQPRRegisterClass)
+ if (RC != ARM::QPRRegisterClass && RC != ARM::QQPRRegisterClass)
return false;
unsigned SubIdx = DefMI->getOperand(2).getImm();
- if (LastSubIdx && LastSubIdx != SubIdx-1)
- return false;
+ if (LastSubIdx) {
+ if (LastSubIdx != SubIdx-1)
+ return false;
+ } else {
+ // Must start from arm_dsubreg_0 or arm_qsubreg_0.
+ if (SubIdx != ARM::DSUBREG_0 && SubIdx != ARM::QSUBREG_0)
+ return false;
+ }
LastSubIdx = SubIdx;
}
return true;