diff options
author | Evan Cheng <evan.cheng@apple.com> | 2011-07-07 03:55:05 +0000 |
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committer | Evan Cheng <evan.cheng@apple.com> | 2011-07-07 03:55:05 +0000 |
commit | 39dfb0ff848be6b380ca81ff95d4ca4e0ae09c76 (patch) | |
tree | 0c4371425daad97700cfaee4ad5fde935ff33bc7 /lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp | |
parent | 6a6b8c3e96b9e1ca7092eafd0cfb219cbbfbdfc4 (diff) |
Change some ARM subtarget features to be single bit yes/no in order to sink them down to MC layer. Also fix tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134590 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp')
-rw-r--r-- | lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp | 33 |
1 files changed, 16 insertions, 17 deletions
diff --git a/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp b/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp index f2b6d25224..2d5c219ae4 100644 --- a/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp +++ b/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp @@ -91,29 +91,28 @@ std::string ARM_MC::ParseARMTriple(StringRef TT, bool &IsThumb) { if (Idx) { unsigned SubVer = TT[Idx]; if (SubVer >= '7' && SubVer <= '9') { - ARMArchFeature = "+v7a"; if (Len >= Idx+2 && TT[Idx+1] == 'm') { - ARMArchFeature = "+v7m"; + // v7m: FeatureNoARM, FeatureDB, FeatureHWDiv + ARMArchFeature = "+v7,+noarm,+db,+hwdiv"; } else if (Len >= Idx+3 && TT[Idx+1] == 'e'&& TT[Idx+2] == 'm') { - ARMArchFeature = "+v7em"; - } + // v7em: FeatureNoARM, FeatureDB, FeatureHWDiv, FeatureDSPThumb2, + // FeatureT2XtPk + ARMArchFeature = "+v7,+noarm,+db,+hwdiv,+t2dsp,t2xtpk"; + } else + // v7a: FeatureNEON, FeatureDB, FeatureDSPThumb2 + ARMArchFeature = "+v7,+neon,+db,+t2dsp"; } else if (SubVer == '6') { - ARMArchFeature = "+v6"; - if (Len >= Idx+3 && TT[Idx+1] == 't' && TT[Idx+2] == '2') { + if (Len >= Idx+3 && TT[Idx+1] == 't' && TT[Idx+2] == '2') ARMArchFeature = "+v6t2"; - } + else + ARMArchFeature = "+v6"; } else if (SubVer == '5') { - ARMArchFeature = "+v5t"; - if (Len >= Idx+3 && TT[Idx+1] == 't' && TT[Idx+2] == 'e') { + if (Len >= Idx+3 && TT[Idx+1] == 't' && TT[Idx+2] == 'e') ARMArchFeature = "+v5te"; - } - } else if (SubVer == '4') { - if (Len >= Idx+2 && TT[Idx+1] == 't') { - ARMArchFeature = "+v4t"; - } else { - ARMArchFeature = ""; - } - } + else + ARMArchFeature = "+v5t"; + } else if (SubVer == '4' && Len >= Idx+2 && TT[Idx+1] == 't') + ARMArchFeature = "+v4t"; } return ARMArchFeature; |