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authorOwen Anderson <resistor@mac.com>2011-02-08 22:39:40 +0000
committerOwen Anderson <resistor@mac.com>2011-02-08 22:39:40 +0000
commit971b83b67a9812556cdb97bb58aa96fb37af458d (patch)
treef930f489860440e92e4bc792b16ac97c96583303 /lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp
parent0fd90bc12f77820e757ef3a427fab9f66aba6381 (diff)
Revert both r121082 (which broke a bunch of constant pool stuff) and r125074 (which worked around it). This should get us back to the old, correct behavior, though it will make the integrated assembler unhappy for the time being.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125127 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp')
-rw-r--r--lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp3
1 files changed, 0 insertions, 3 deletions
diff --git a/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp b/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp
index 941c69d14e..4f03b8497b 100644
--- a/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp
+++ b/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp
@@ -574,9 +574,6 @@ void ARMInstPrinter::printAddrModeImm12Operand(const MCInst *MI, unsigned OpNum,
if (!MO1.isReg()) { // FIXME: This is for CP entries, but isn't right.
printOperand(MI, OpNum, O);
return;
- } else if (MO1.getReg() == ARM::PC && MO2.isExpr()) {
- printOperand(MI, OpNum+1, O);
- return;
}
O << "[" << getRegisterName(MO1.getReg());