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| author | Kevin Enderby <enderby@apple.com> | 2011-02-28 21:45:12 +0000 |
|---|---|---|
| committer | Kevin Enderby <enderby@apple.com> | 2011-02-28 21:45:12 +0000 |
| commit | 4da434cd40b3ae9ea6ff3bef8881d17cca608420 (patch) | |
| tree | dc0ea64cce452dfc9a5ddfce5b667cf4d892131b /lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h | |
| parent | 2ddfd95d40e07f5fdf179a16e15a5d7c131837d8 (diff) | |
Add missing whitespace in the formatting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126687 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h')
| -rw-r--r-- | lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h b/lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h index 074561c02d..33889da77d 100644 --- a/lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h +++ b/lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h @@ -1720,7 +1720,7 @@ static bool DisassembleThumb2BrMiscCtrl(MCInst &MI, unsigned Opcode, } // Some instructions have predicate operands first before the immediate. - if(Opcode == ARM::tBLXi_r9 || Opcode == ARM::tBLr9) { + if (Opcode == ARM::tBLXi_r9 || Opcode == ARM::tBLr9) { // Handling the two predicate operands before the imm operand. if (B->DoPredicateOperands(MI, Opcode, insn, NumOps)) NumOpsAdded += 2; |