diff options
| author | Evan Cheng <evan.cheng@apple.com> | 2010-08-11 06:22:01 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2010-08-11 06:22:01 +0000 |
| commit | 11db068721d44fd5f9b0c2a3a4c90f813d2eae9c (patch) | |
| tree | 7649fa37f8869eb5f872a3d73eb58587295b6cf1 /lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp | |
| parent | 3483acabf012b847b13b969ebd9ce5c4d16d9eb7 (diff) | |
- Add subtarget feature -mattr=+db which determine whether an ARM cpu has the
memory and synchronization barrier dmb and dsb instructions.
- Change instruction names to something more sensible (matching name of actual
instructions).
- Added tests for memory barrier codegen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110785 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp')
| -rw-r--r-- | lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp b/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp index f9c57634ef..99d9f01c04 100644 --- a/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp +++ b/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp @@ -493,7 +493,7 @@ static inline ARM_AM::AMSubMode getAMSubModeForBits(unsigned bits) { static bool DisassemblePseudo(MCInst &MI, unsigned Opcode, uint32_t insn, unsigned short NumOps, unsigned &NumOpsAdded, BO) { - if (Opcode == ARM::Int_MemBarrierV7 || Opcode == ARM::Int_SyncBarrierV7) + if (Opcode == ARM::DMBsy || Opcode == ARM::DSBsy) return true; assert(0 && "Unexpected pseudo instruction!"); |