diff options
| author | Owen Anderson <resistor@mac.com> | 2011-09-19 23:47:10 +0000 |
|---|---|---|
| committer | Owen Anderson <resistor@mac.com> | 2011-09-19 23:47:10 +0000 |
| commit | 9f666b5f2e4a5e94cd667e5be0c5d513dd64ea67 (patch) | |
| tree | d2efb92ed915efbff6776107911a6e90a4da196f /lib/Target/ARM/Disassembler/ARMDisassembler.cpp | |
| parent | 0b9a90932d65f39ca5e8f12631a604ab756c5ead (diff) | |
CPS instructions are UNPREDICTABLE inside IT blocks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140102 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/Disassembler/ARMDisassembler.cpp')
| -rw-r--r-- | lib/Target/ARM/Disassembler/ARMDisassembler.cpp | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp index 5fd641db2d..6e4bb8c64c 100644 --- a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp +++ b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp @@ -445,6 +445,10 @@ ThumbDisassembler::AddThumbPredicate(MCInst &MI) const { case ARM::t2Bcc: case ARM::tCBZ: case ARM::tCBNZ: + case ARM::tCPS: + case ARM::t2CPS3p: + case ARM::t2CPS2p: + case ARM::t2CPS1p: // Some instructions (mostly conditional branches) are not // allowed in IT blocks. if (!ITBlock.empty()) |