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authorSilviu Baranga <silviu.baranga@arm.com>2013-03-15 18:28:25 +0000
committerSilviu Baranga <silviu.baranga@arm.com>2013-03-15 18:28:25 +0000
commitbcbf3fddef46f1f6e2f2408064c4b75e4b6c90f5 (patch)
tree659e38348e38eed0a949be8fce08e3e9e8e9951a /lib/Target/ARM/CMakeLists.txt
parent133c0d36e1fdeda88d784017bafa8a1b22af8aca (diff)
Adding an A15 specific optimization pass for interactions between S/D/Q registers. The pass handles all the required transformations pre-regalloc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177169 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/CMakeLists.txt')
-rw-r--r--lib/Target/ARM/CMakeLists.txt1
1 files changed, 1 insertions, 0 deletions
diff --git a/lib/Target/ARM/CMakeLists.txt b/lib/Target/ARM/CMakeLists.txt
index 586834cf73..b832508a08 100644
--- a/lib/Target/ARM/CMakeLists.txt
+++ b/lib/Target/ARM/CMakeLists.txt
@@ -15,6 +15,7 @@ tablegen(LLVM ARMGenDisassemblerTables.inc -gen-disassembler)
add_public_tablegen_target(ARMCommonTableGen)
add_llvm_target(ARMCodeGen
+ A15SDOptimizer.cpp
ARMAsmPrinter.cpp
ARMBaseInstrInfo.cpp
ARMBaseRegisterInfo.cpp