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| author | Daniel Dunbar <daniel@zuster.org> | 2011-11-04 19:04:23 +0000 |
|---|---|---|
| committer | Daniel Dunbar <daniel@zuster.org> | 2011-11-04 19:04:23 +0000 |
| commit | b0d9ce567f5aee3af94c290d7cd52b1582c27b4f (patch) | |
| tree | cf2b86b94d23ce5d4469ea5b40b31358fa98b707 /lib/Target/ARM/CMakeLists.txt | |
| parent | b0527283682c5f44fae24ae0a7e2e794f019fade (diff) | |
build/cmake: Use tblgen macro directly instead of llvm_tablegen, which just
added a layer of indirection with no value (not even conciseness).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143727 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/CMakeLists.txt')
| -rw-r--r-- | lib/Target/ARM/CMakeLists.txt | 26 |
1 files changed, 13 insertions, 13 deletions
diff --git a/lib/Target/ARM/CMakeLists.txt b/lib/Target/ARM/CMakeLists.txt index d6a5c57847..baa55f224a 100644 --- a/lib/Target/ARM/CMakeLists.txt +++ b/lib/Target/ARM/CMakeLists.txt @@ -1,18 +1,18 @@ set(LLVM_TARGET_DEFINITIONS ARM.td) -llvm_tablegen(ARMGenRegisterInfo.inc -gen-register-info) -llvm_tablegen(ARMGenInstrInfo.inc -gen-instr-info) -llvm_tablegen(ARMGenCodeEmitter.inc -gen-emitter) -llvm_tablegen(ARMGenMCCodeEmitter.inc -gen-emitter -mc-emitter) -llvm_tablegen(ARMGenMCPseudoLowering.inc -gen-pseudo-lowering) -llvm_tablegen(ARMGenAsmWriter.inc -gen-asm-writer) -llvm_tablegen(ARMGenAsmMatcher.inc -gen-asm-matcher) -llvm_tablegen(ARMGenDAGISel.inc -gen-dag-isel) -llvm_tablegen(ARMGenFastISel.inc -gen-fast-isel) -llvm_tablegen(ARMGenCallingConv.inc -gen-callingconv) -llvm_tablegen(ARMGenSubtargetInfo.inc -gen-subtarget) -llvm_tablegen(ARMGenEDInfo.inc -gen-enhanced-disassembly-info) -llvm_tablegen(ARMGenDisassemblerTables.inc -gen-disassembler) +tablegen(LLVM ARMGenRegisterInfo.inc -gen-register-info) +tablegen(LLVM ARMGenInstrInfo.inc -gen-instr-info) +tablegen(LLVM ARMGenCodeEmitter.inc -gen-emitter) +tablegen(LLVM ARMGenMCCodeEmitter.inc -gen-emitter -mc-emitter) +tablegen(LLVM ARMGenMCPseudoLowering.inc -gen-pseudo-lowering) +tablegen(LLVM ARMGenAsmWriter.inc -gen-asm-writer) +tablegen(LLVM ARMGenAsmMatcher.inc -gen-asm-matcher) +tablegen(LLVM ARMGenDAGISel.inc -gen-dag-isel) +tablegen(LLVM ARMGenFastISel.inc -gen-fast-isel) +tablegen(LLVM ARMGenCallingConv.inc -gen-callingconv) +tablegen(LLVM ARMGenSubtargetInfo.inc -gen-subtarget) +tablegen(LLVM ARMGenEDInfo.inc -gen-enhanced-disassembly-info) +tablegen(LLVM ARMGenDisassemblerTables.inc -gen-disassembler) add_public_tablegen_target(ARMCommonTableGen) add_llvm_target(ARMCodeGen |