Second attempt:

Massive check in. This changes the "-fast" flag to "-O#" in llc. If you want to
use the old behavior, the flag is -O0. This change allows for finer-grained
control over which optimizations are run at different -O levels.

Most of this work was pretty mechanical. The majority of the fixes came from
verifying that a "fast" variable wasn't used anymore. The JIT still uses a
"Fast" flag. I'll change the JIT with a follow-up patch.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70343 91177308-0d34-0410-b5e6-96231b3b80d8

1 files changed, 16 insertions, 12 deletions

diff --git a/lib/Target/ARM/ARMTargetMachine.cpp b/lib/Target/ARM/ARMTargetMachine.cpp
index 9b6e51267f..a2ee52e30d 100644
--- a/lib/Target/ARM/ARMTargetMachine.cpp
+++ b/lib/Target/ARM/ARMTargetMachine.cpp
@@ -138,35 +138,37 @@ const TargetAsmInfo *ARMTargetMachine::createTargetAsmInfo() const {
 
 
 // Pass Pipeline Configuration
-bool ARMTargetMachine::addInstSelector(PassManagerBase &PM, bool Fast) {
+bool ARMTargetMachine::addInstSelector(PassManagerBase &PM, unsigned OptLevel) {
   PM.add(createARMISelDag(*this));
   return false;
 }
 
-bool ARMTargetMachine::addPreEmitPass(PassManagerBase &PM, bool Fast) {
+bool ARMTargetMachine::addPreEmitPass(PassManagerBase &PM, unsigned OptLevel) {
   // FIXME: temporarily disabling load / store optimization pass for Thumb mode.
-  if (!Fast && !DisableLdStOpti && !Subtarget.isThumb())
+  if (OptLevel != 0 && !DisableLdStOpti && !Subtarget.isThumb())
     PM.add(createARMLoadStoreOptimizationPass());
 
-  if (!Fast && !DisableIfConversion && !Subtarget.isThumb())
+  if (OptLevel != 0 && !DisableIfConversion && !Subtarget.isThumb())
     PM.add(createIfConverterPass());
 
   PM.add(createARMConstantIslandPass());
   return true;
 }
 
-bool ARMTargetMachine::addAssemblyEmitter(PassManagerBase &PM, bool Fast,
-                                          bool Verbose, raw_ostream &Out) {
+bool ARMTargetMachine::addAssemblyEmitter(PassManagerBase &PM,
+                                          unsigned OptLevel,
+                                          bool Verbose,
+                                          raw_ostream &Out) {
   // Output assembly language.
   assert(AsmPrinterCtor && "AsmPrinter was not linked in");
   if (AsmPrinterCtor)
-    PM.add(AsmPrinterCtor(Out, *this, Fast, Verbose));
+    PM.add(AsmPrinterCtor(Out, *this, OptLevel, Verbose));
 
   return false;
 }
 
 
-bool ARMTargetMachine::addCodeEmitter(PassManagerBase &PM, bool Fast,
+bool ARMTargetMachine::addCodeEmitter(PassManagerBase &PM, unsigned OptLevel,
                                       bool DumpAsm, MachineCodeEmitter &MCE) {
   // FIXME: Move this to TargetJITInfo!
   if (DefRelocModel == Reloc::Default)
@@ -177,20 +179,22 @@ bool ARMTargetMachine::addCodeEmitter(PassManagerBase &PM, bool Fast,
   if (DumpAsm) {
     assert(AsmPrinterCtor && "AsmPrinter was not linked in");
     if (AsmPrinterCtor)
-      PM.add(AsmPrinterCtor(errs(), *this, Fast, true));
+      PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true));
   }
 
   return false;
 }
 
-bool ARMTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM, bool Fast,
-                                        bool DumpAsm, MachineCodeEmitter &MCE) {
+bool ARMTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
+                                            unsigned OptLevel,
+                                            bool DumpAsm,
+                                            MachineCodeEmitter &MCE) {
   // Machine code emitter pass for ARM.
   PM.add(createARMCodeEmitterPass(*this, MCE));
   if (DumpAsm) {
     assert(AsmPrinterCtor && "AsmPrinter was not linked in");
     if (AsmPrinterCtor)
-      PM.add(AsmPrinterCtor(errs(), *this, Fast, true));
+      PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true));
   }
 
   return false;