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author | Silviu Baranga <silviu.baranga@arm.com> | 2012-09-13 15:05:10 +0000 |
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committer | Silviu Baranga <silviu.baranga@arm.com> | 2012-09-13 15:05:10 +0000 |
commit | 616471d4bfe4717fa86259ff4534703357b3b723 (patch) | |
tree | eff84fd8f8d83fe0a8edb28431c82cff90cf9a0e /lib/Target/ARM/ARMTargetMachine.cpp | |
parent | 91a7e0184a4f7976ef11cb48697d2782fc1b9be7 (diff) |
This patch introduces A15 as a target in LLVM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163803 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMTargetMachine.cpp')
-rw-r--r-- | lib/Target/ARM/ARMTargetMachine.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/ARM/ARMTargetMachine.cpp b/lib/Target/ARM/ARMTargetMachine.cpp index 171c9adfa4..133a7dd8c7 100644 --- a/lib/Target/ARM/ARMTargetMachine.cpp +++ b/lib/Target/ARM/ARMTargetMachine.cpp @@ -150,7 +150,7 @@ bool ARMPassConfig::addPreRegAlloc() { // FIXME: temporarily disabling load / store optimization pass for Thumb1. if (getOptLevel() != CodeGenOpt::None && !getARMSubtarget().isThumb1Only()) addPass(createARMLoadStoreOptimizationPass(true)); - if (getOptLevel() != CodeGenOpt::None && getARMSubtarget().isCortexA9()) + if (getOptLevel() != CodeGenOpt::None && getARMSubtarget().isLikeA9()) addPass(createMLxExpansionPass()); return true; } |