diff options
| author | Evan Cheng <evan.cheng@apple.com> | 2011-07-20 07:51:56 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2011-07-20 07:51:56 +0000 |
| commit | 34ad6db8b958fdc0d38e122edf753b5326e69b03 (patch) | |
| tree | c129b78e36733ba161a2e687349a0eb40d2ec807 /lib/Target/ARM/ARMTargetMachine.cpp | |
| parent | 4c8164813c1be51f6797fda6826bdf3665f2a7d1 (diff) | |
- Move CodeModel from a TargetMachine global option to MCCodeGenInfo.
- Introduce JITDefault code model. This tells targets to set different default
code model for JIT. This eliminates the ugly hack in TargetMachine where
code model is changed after construction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135580 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMTargetMachine.cpp')
| -rw-r--r-- | lib/Target/ARM/ARMTargetMachine.cpp | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/lib/Target/ARM/ARMTargetMachine.cpp b/lib/Target/ARM/ARMTargetMachine.cpp index 92f2f5bf40..3758b0ddf0 100644 --- a/lib/Target/ARM/ARMTargetMachine.cpp +++ b/lib/Target/ARM/ARMTargetMachine.cpp @@ -64,8 +64,8 @@ extern "C" void LLVMInitializeARMTarget() { /// ARMBaseTargetMachine::ARMBaseTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, - Reloc::Model RM) - : LLVMTargetMachine(T, TT, CPU, FS, RM), + Reloc::Model RM, CodeModel::Model CM) + : LLVMTargetMachine(T, TT, CPU, FS, RM, CM), Subtarget(TT, CPU, FS), JITInfo(), InstrItins(Subtarget.getInstrItineraryData()) { @@ -76,8 +76,8 @@ ARMBaseTargetMachine::ARMBaseTargetMachine(const Target &T, StringRef TT, ARMTargetMachine::ARMTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, - Reloc::Model RM) - : ARMBaseTargetMachine(T, TT, CPU, FS, RM), InstrInfo(Subtarget), + Reloc::Model RM, CodeModel::Model CM) + : ARMBaseTargetMachine(T, TT, CPU, FS, RM, CM), InstrInfo(Subtarget), DataLayout(Subtarget.isAPCS_ABI() ? std::string("e-p:32:32-f64:32:64-i64:32:64-" "v128:32:128-v64:32:64-n32") : @@ -94,8 +94,8 @@ ARMTargetMachine::ARMTargetMachine(const Target &T, StringRef TT, ThumbTargetMachine::ThumbTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, - Reloc::Model RM) - : ARMBaseTargetMachine(T, TT, CPU, FS, RM), + Reloc::Model RM, CodeModel::Model CM) + : ARMBaseTargetMachine(T, TT, CPU, FS, RM, CM), InstrInfo(Subtarget.hasThumb2() ? ((ARMBaseInstrInfo*)new Thumb2InstrInfo(Subtarget)) : ((ARMBaseInstrInfo*)new Thumb1InstrInfo(Subtarget))), |